The sixteen DACs in the AMC7836 device are split into four groups, each with four DACs. The output range and clamp voltage for each DAC group is set independently which enables the device to operate in one of the following modes:
• All-positive DAC range mode
• All-negative DAC range mode
• Mixed DAC range mode
7.4.1 All-Positive DAC Range Mode
In the AMC7836 all-positive DAC range mode, each of the four DAC groups is set to a positive voltage output range (0 to 5 V or 0 to 10 V).
Because the maximum DAC output for each group cannot exceed the common AVCC voltage for the device (AVCC = AVCC_AB = AVCC_CD), a DAC group in the 0 to 10 V output range forces the AVCC voltage to a value greater or equal to 10 V even if the remaining DAC groups are set in the 0 to 5 V range. If all DAC groups are set in the 0 to 5 V range the AVCCvoltage can be set to a value as low as 5 V.
The minimum DAC output for each group cannot be lower than the AVSSvoltage but because the minimum DAC output is 0 V in the all-positive DAC range mode, all of the AVSSpins (AVEE, AVSSB, AVSSC, and AVSSD) as well as the device thermal pad can be tied to AGND thus simplifying the board design. Table 5 lists the typical configurations for this mode.
Table 5. All-positive DAC Range Mode Typical Configuration
PIN NOTES TYPICAL CONNECTION
AVDD 5 V
DVDD DVDDmust be equal to AVDD. 5 V
IOVDD IOVDDmust be equal to or less than DVDD. 1.8 V to 5 V
AVCC_AB, AVCC_CD
The AVCC_ABand AVCC_CDpins must be tied to the same potential (AVCC).
AVCCmust be greater or equal than the maximum possible output voltage for any of the sixteen DACs.
AVCC≥ 5 V AVCC≥ 10 V
AVEE AGND
AVSSB, AVSSC, AVSSD AGND
Thermal Pad AGND
After power-on or a reset event the output range for each DAC group is set automatically by the voltage present on the corresponding AVSSpin. In the all-positive DAC range mode all AVSSpins are connected to AGND and consequently all four DAC groups will initialize by default to the 0 to 5 V range. The output for any of the DAC groups can be modified to the 0 to 10 V range after initialization by setting the corresponding DAC range register (address 0x1E to 0x1F) to 110b.
In addition to setting the default output range, the AVSS pins also set the clamp voltage for each DAC group.
Because the clamp voltage is only dependent on the voltage in the AVSS pin, changes to the DAC range registers do not affect the clamp setting. With the AVSS pins connected to AGND, the clamp voltage for all sixteen DACs is 0 V.
7.4.2 All-Negative DAC Range Mode
In the AMC7836 all-negative DAC range mode, each of the four DAC groups is set to a negative voltage output range (–5 to 0 V or –10 to 0 V).
Although the maximum DAC output does not exceed 0 V, the common AVCC voltage (AVCC = AVCC_AB = AVCC_CD) must still satisfy a minimum voltage of 4.7 V to comply with the device operating conditions. In this case a recommended approach is to tie the AVCC, AVDD, and DVDDsupply pins to a common potential.
The minimum DAC output for each group cannot be lower than the voltage on the corresponding AVSS pins (AVEE, AVSSB, AVSSC, and AVSSD). The AVSSpins are not required to be tied to the same potential and typically the negative voltage at each AVSS pin is dictated by the desired operating DAC negative output range. One exception is the AVEEpin which must be the lowest potential in the device. The thermal pad should be either tied to the same potential as the AVEEpin or left disconnected.Table 6lists the typical configurations for this mode.
Table 6. All-Negative DAC Range Mode Typical Configuration
PIN NOTES TYPICAL CONNECTION
AVDD 5 V
DVDD DVDDmust be equal to AVDD. 5 V
IOVDD IOVDDmust be equal to or less than DVDD. 1.8 V to 5 V AVCC_AB, AVCC_CD The AVCC_ABand AVCC_CDpins must be tied
to the same potential (AVCC). 5 V
AVEE
AVEEmust be the lowest potential in the device.
AVEEmust be less than or equal to the minimum possible output voltage for DAC group A.
AVEE≤ –5 V AVEE≤ –10 V
AVSSB, AVSSC, AVSSD
AVSSnmust be less than or equal to the minimum possible output voltage for DAC group n (n = B, C, D).
AVEE≤ AVSSn≤ –5 V AVEE≤ AVSSn≤ –10 V
Thermal Pad AVEEor,
Floating
After power-on or a reset event the output range for each DAC group is set automatically by the voltage present in the corresponding AVSS pin. In the all-negative DAC range mode all AVSS pins should be connected to a voltage lower than AVSSTH. If this condition is satisfied, all four DAC groups will initialize by default to the –10- to 0-V range. Because the negative clamp voltage is only dependent on the voltage in the AVSS pin, the default –10- to 0-V output range presents no risk even when the AVSS voltage is greater than –10 V. In this case the DAC group output should be modified to the –5 to 0 V range after initialization by setting the corresponding DAC range register (address 0x1E to 0x1F) to 101b.
7.4.3 Mixed DAC Range Mode
In the AMC7836 mixed DAC range mode, a combination of DAC groups is set to a negative voltage output range (–5 to 0 V or –10 to 0 V) and a positive voltage output range (0 to 5 V or 0 to 10 V).
Because the maximum DAC output for each group cannot exceed the common AVCC voltage for the device (AVCC = AVCC_AB = AVCC_CD), a DAC group in the 0 to 10 V output range forces the AVCC voltage to a value greater or equal to 10 V. If all positive DAC groups are in the 0 to 5 V range the AVCC voltage can be set to a value as low as 5 V.
The minimum DAC output for each group cannot be lower than the voltage on the corresponding AVSS pins (AVEE, AVSSB, AVSSCand AVSSD). The AVSS pins are not required to be tied to the same potential and typically the negative voltage at each AVSS pin is dictated by the desired operating DAC negative output range. One exception is the AVEEpin which must be the lowest potential in the device. The implication of this requirement is that if either DAC group B, C or D is set to a negative output range, DAC group A must also be set to a negative range. The thermal pad should be either tied to the same potential as the AVEEpin or left disconnected.Table 7 lists the typical configurations for this mode.
Table 7. Mixed DAC Range Mode Typical Configuration
PIN NOTES TYPICAL CONNECTION
AVDD 5 V
DVDD DVDDmust be equal to AVDD. 5 V
IOVDD IOVDDmust be equal to or less than DVDD. 1.8 V to 5 V
AVCC_AB, AVCC_CD
The AVCC_ABand AVCC_CDpins must be tied to the same potential (AVCC).
AVCCmust be greater or equal to the maximum possible output voltage for any of the positive output range DACs.
AVCC≥ 5 V AVCC≥ 10 V
AVEE
AVEE must be the lowest potential in the device.
AVEEmust be less than or equal to the minimum possible output voltage for DAC group A.
AVEE≤ –5 V AVEE≤ –10 V
AVSSB, AVSSC, AVSSD
AVSSnmust be less than or equal than the minimum possible output voltage for DAC group n (n = B, C, D).
Negative Range AVEE≤ AVSSn≤ –5 V AVEE≤ AVSSn≤ –10 V
Positive Range AGND
Thermal Pad AVEEor,
Floating
After power-on or a reset event the output range for each DAC group is set automatically by the voltage present in the corresponding AVSSpin. When the AVSSvoltage of a DAC group is lower than the threshold value, AVSSTH, the output for that DAC group is automatically configured to the –10 to 0 V range. Conversely, if the AVSSvoltage of the DAC group is higher than AVSSTH, the DAC-group output is automatically set to the 0 to 5 V range. The output for any of the DAC groups can be modified after initialization by setting the corresponding DAC range register (address 0x1E to 0x1F).
In addition to setting the default output range, the AVSS pins also set the clamp voltage for each DAC group.
Because the clamp voltage is only dependent on the voltage in the AVSS pin, changes to the DAC range registers do not affect the clamp setting.
NOTE
Although not a recommended operating condition, the device allows a DAC group to
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A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
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R/W A14 A13 A12 A11 A10 CS
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