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N a t i o n a lS e m i co n d u c t o r

LMC6084

Precision CMOS Quad Operational Amplifier

General Description

The LM C6084 is a precision quad low offset voltage opera­

tional amplifier, capable of single supply operation. Perform­

ance characteristics include ultra low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltage range that includes ground. These features, plus its low offset voltage, m ake the LM C 6084 ideally suited for precision circuit applications.

Other applications using the LM C 6084 include precision full- wave rectifiers, integrators, references, and sample-and- hold circuits.

This device is built with National’s advanced Double-Poly Silicon-Gate C M O S process.

For designs with more critical power demands, see the LM C6064 precision quad micropower operational amplifier.

For a single or dual operational amplifier with similar fea­

tures, see the LMC6081 or LM C 6082 respectively.

Features

(Typical unless otherwise stated)

■ Low offset voltage 150 jaV

■ Operates from 4.5V to 15V single supply

■ Ultra low input bias current 10 fA

■ Output swing to within 20 mV of supply rail, 100k load

■ Input common-mode range includes V ~

■ High voltage gain 130 dB

■ Improved latchup immunity

Applications

■ Instrumentation amplifier

■ Photodiode and infrared detector preamplifier

■ Transducer amplifiers

■ Medical instrumentation

■ D /A converter

■ Charge amplifier for piezoelectric transducers

PATENT PENDING

Connection Diagram

14-Pin DIP/SO

OUTPUT 4

INVERTING INPUT 4

NON-INVERTING INPUT 4

V -

N0N-INVERTING INPUT 3

INVERTING INPUT 3

OUTPUT 3

TL/H /11467-1

Ordering Information

Package

Temperature Range

NSC Drawing

Transport Media Military

— 55°C to +125°C

Industrial

—40°C to +85°C 14-Pin

Molded DIP

LM C6084AMN LMC6084AIN

LM C6084IN N14A Rail

14-Pin LMC6084AIM

M 14A Rail

M C 6 0 8 4

(2)

L M C 6 0 8

Absolute Maximum Ratings (Notei)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.

Differential Input Voltage ± Supply Voltage Voltage at Input/Output Pin (V + ) + 0.3V, (Y ~ ) - 0 . 3 V

Supply Voltage (V + - V ~ ) 16V

Output Short Circuit to V + (Note 11)

Output Short Circuit to V ~ (Note 2)

Lead Temperature (Soldering, iO Sec.) 260°C Storage Temp. Range - 65°C to + 1 50°C

Junction T emperature 150°C

ESD Tolerance (Note 4) 2 kV

Current at Input Pin Current at Output Pin Current at Power Supply Pin Power Dissipation

± 1 0 mA

± 3 0 mA 40 mA (Note 3)

Operating Ratings (Note d

Tem perature Range

LM C 6084A M - 5 5 ° C ^ T j <: + 125°C LMC6084AI, LMC6084I - 4 0 ° G <£ T j <; + 8 5 °C

Supply Voltage 4.5V ^ V + ^ 15.5V

Thermal Resistance (Oj/0 (Note 12)

14-Pin Molded DIP 8 1 °C /W

14-Pin SO 1 26 °C /W

Power Dissipation (Note 10)

DC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T j = 25°C. Boldface limits apply at the temperature extremes. V + = 5V, V - = 0V, Vc m = 1.5V, V o = 2.5V and R|_ > 1M unless otherwise specified.

Typ (Note 5)

LMC6084AM LMC6084AI LMC6084I

Symbol Parameter Conditions Limit Limit Limit Units

(Note 6) (Note 6) (Note 6)

Vos Input Offset Voltage 150 350 350 800 juV

1 0 0 0 8 0 0 1 3 0 0 Max

TC Vos Input Offset Voltage

Average Drift 1.0 JLtV/°C

b Input Bias Current 0.010 pA

1 0 0 4 4 Max

*os Input Offset Current 0.005 pA

1 0 0 2 2 Max

Rin Input Resistance > 1 0 T e r a ft

C M RR Common Mode o v <; v CM ^ 12.0V 85 75 75 66 dB

Rejection Ratio V + = 15V 7 2 7 2 6 3 Min

+ PSRR Positive Power Supply 5V <; V + ^ 15V 85 75 75 66 dB

Rejection Ratio V0 = 2.5V 7 2 7 2 6 3 Min

— PSRR Negative Power Supply OV ^ V - ^ -- 1 0 V 94 84 84 74 dB

Rejection Ratio 8 1 81 71 Min

Vc m Input Common-Mode V + = 5V and 15V - 0 . 4 -0.1 - 0.1 - 0.1 V

Voltage Range for C M R R > 60 dB 0 0 0 Max

V + - 1.9 V + - 2.3 V + - 2.3 V + - 2.3 V V + - 2 .6 V + - 2.5 V + - 2 .5 Min

Av Large Signal R L = 2 k ft Sourcing 1400 400 400 300 V /m V

Voltage Gain (Note 7) 3 0 0 3 0 0 2 0 0 Min

Sinking 350 180 180 90 V /m V

7 0 1 0 0 6 0 Min

Rl = 6 0 0 ft Sourcing 1200 4 00 400 200 V /m V

(Note 7) 1 5 0 1 5 0 8 0 Min

Sinking 150 100 100 70 V /m V

3 5 5 0 3 5 Min

(3)

DC Electrical Characteristics

(Continued)

Unless otherwise specified, all limits guaranteed for T j = 25°C. Boldface limits apply at the temperature extremes. V + = 5V, V ~ = OV, Vc m = 1.5V, Vq = 2.5V and Rl > 1M unless otherwise specified.

Typ (Note 5)

LMC6084AM LMC6084AI LMC6084I

Symbol Parameter Conditions Limit Limit Limit Units

(Note 6) (Note 6) (Note 6) V o Output Swing < + ll cn <

4.87 4.80 4.80 4.75 V

Rl = 2 kft to 2.5V 4 .7 0 4 .7 3 4 .6 7 Min

0.10 0.13 0.13 0.20 V

0 .1 9 0 .1 7 0 .2 4 Max

V + = 5V

4.61 4.50 4.50 4.40 V

Rl = 6 0 0 ft to 2.5V 4 .2 4 4 .3 1 4 .2 1 Min

0.30 0.40 0.40 0.50 V

0 .6 3 0 .5 0 0 .6 3 Max

V + = 15V

14.63 14.50 14.50 14.37 V

Rl = 2 k ft to 7.5V 1 4 .3 0 1 4 .3 4 1 4 .2 5 Min

0.26 0.35 0.35 0.44 V

0 .4 8 0 .4 5 0 .5 6 Max

>LO

II+>

13.90 13.35 13.35 12.92 V

Rl = 6 0 0 ft to 7.5V 1 2 .8 0 1 2 .8 6 1 2 .4 4 Min

0.79 1.16 1.16 1.33 V

1.42 1.32 1 .5 8 Max

*0 Output Current Sourcing, Vq = OV

22 16 16 13 mA

V + = 5V 8 10 8 Min

Sinking, Vq = 5V

21 16 16 13 mA

11 13 10 Min

<0 Output Current Sourcing, Vq = OV

30 28 28 23 mA

V + = 15V 18 2 2 18 Min

Sinking, V0 = 13V 28 28 23 mA

(Note 11) 34 19 2 2 18 Min

Is Supply Current All Four Amplifiers

1.8 3.0 3.0 3.0 mA

V + = + 5V, V0 = 1.5V 3 .6 3 .6 3 .6 Max

All Four Amplifiers

2.2 3.4 3.4 3.4 mA

V + = + 1 5V, V0 = 7.5V 4 .0 4 .0 4 .0 Max

M C 6 0 8 4

(4)

L M C 6 0 8

AC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for T j = 25°C, Boldface limits apply at the temperature extremes. V + = 5V, V ~ = OV, Vq m = 1.5V, Vq = 2.5V and R|_ > 1M unless otherwise specified.

Typ (Note 5)

LMC6084AM LMC6084AI LMC6084I

Symbol Parameter Conditions Limit Limit Limit Units

(Note 6) (Note 6) (Note 6)

SR Slew Rate (Note 8) 1.5 0.8 0.8 0.8 V/jms

0 .5 0 .6 0 .6 Min

GBW Gain-Bandwidth Product 1.3 MHz

^m Phase Margin 50 Deg

Amp-to-Amp Isolation (Note 9) 140 dB

e n Input-Referred Voltage Noise F = 1 kHz 22 nV/yTHz

■n Input-Referred Current Noise F = 1 kHz 0.0002 p A /y lH z

T.H.D. Total Harmonic Distortion F = 10 kHz, Av = - 1 0 R|_ = 2 k fl, V0 = 8 Vpp

± 5 V Supply

0.01 %

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.

The guaranteed specifications apply only for the test conditions listed.

Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ± 3 0 mA over long term may adversely affect reliability.

Note 3: The maximum power dissipation is a function of Tj^a*), 0ja, and T^. The maximum allowable power dissipation at any ambient temperature is Pd “ Oj(Max) - Ta) /0ja-

Note 4: Human body model, 1.5 k fl in series with 100 pF.

Note 5: Typical values represent the most likely parametric norm.

Note 6: All limits are guaranteed by testing or statistical analysis.

Note 7: V + = 15V, Vqm = 7.5V and R|_ connected to 7.5V. For Sourcing tests, 7.5V ^ Vo ^ 11.5V. For Sinking tests, 2.5V <. V o <.7.5V.

Note 8: V + = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.

Note 9: Input referred V + = 15V and Rl = 100 k fl connected to 7.5V. Each amp excited in turm with 1 kHz to produce Vo = 12 Vpp.

Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance 0jawith Pq = (Tj - Ta)/0ja- All numbers apply for packages soldered directly into a PC board.

Note 11: Do not connect output to V + , when V + is greater than 13V or reliability will be adversely affected.

Note 12: All numbers apply for packages soldered directly into a PC board.

(5)

Typical Performance Characteristics

Vs = ± 7 .5 V ,Ta = 25°C, Unless otherwise specified Distribution of LMC6084

Input Offset Voltage (TA = + 25°C)

OFFSET VOLTAGE (m V)

Input Bias Current

0 25 50 75 100 125 150 TEMPERATURE(°C)

Common Mode Rejection Ratio

10 100 Ik 10k 100k

FREQUENCY(Hz)

Output Characteristics Sourcing Current

Distribution of LMC6084 Input Offset Voltage (Ta = — 55°C)

OFFSET VOLTAGE (m V)

Supply Current vs Supply Voltage

4 .0 0 --- --- --- --- --- r 3 .5 0

0 .5 0

0 U^J---- ---

0 2 4 6 8 10 12 14 16 TOTAL SUPPLY VOLTAGE (VDC)

Distribution of LMC6084 Input Offset Voltage (TA = + 125°C)

OFFSET VOLTAGE (m V)

Input Voltage

- 1 0 - 8 - 6 - 4 - 2 0 2 4 6 8 10 OUTPUT VOLTAGE (V)

Power Supply Rejection

FREQUENCY(Hz)

Output Characteristics Sinking Current

Input Voltage Noise

10 100 1k 10k

FREQUENCY(Hz)

Gain and Phase Response vs Temperature

S

I

M C 6 0 8 4

(6)

L M C 6 0 8

Typical Performance Characteristics

Vs = ± 7 .5 V , Ta = 2 5°C, Unless otherwise specified (Continued)

Gain and Phase

Response vs Capacitive Load with R|_ = 600ft

1

I

Gain and Phase

Response vs Capacitive Load with Rl = 500 kft

10k 100k 1M 10M

FREQUENCY (Hz)

Inverting Small Signal Inverting Large Signal

TIME(1 /t s /D iv ) TIME(1 ^ s /D iv )

Non-Inverting Large Signal Pulse Response

TIM E(1 /x s /D iv )

Crosstalk Rejection

10 100 I k 10k 100k

FREQUENCY(Hz)

Stability vs Capacitive Load Rl = 1 Mft

OUTPUT VOLTAGE (V)

Open Loop Frequency Response

0 . 0 1 0 .1 1 10 100 Ik 10k lO O kIM 10M FREQUENCY(Hz)

Non-Inverting Small Signal Pulse Response

TIME(1 fis/Olv)

Stability vs Capacitive Load, Rl = 600ft

10000

a.5 10

1 - L I 1-1 .. I 1 I I I

- 6 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 6 OUTPUT VOLTAGE (V )

T L/H /1 1467-3

(7)

Applications Hints

AMPLIFIER TOPOLOGY

The LM C 6084 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken di­

rectly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to main­

tain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LM C 6084 both easier to design with, and provide higher speed than products typically found in this ultra-low power class.

COMPENSATING FOR INPUT CAPACITANCE

It is quite common to use large values of feedback resist­

ance for amplifiers with ultra-low input current, like the LM C6084.

Although the LM C 6084 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors and even small values of input capacitance, due to transducers, photodi­

odes, and circuit board parasitics, reduce phase margins.

W hen high input impedances are demanded, guarding of the LM C 6084 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well.

(See P rinted-C ircuit-B oard Layout fo r H igh Im pedance Work).

The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors (as in Figure 1) such that:

1 1

27tR-|C|n 27rR2Cf or

Rl C

in

^ R2 Cf

Since it is often difficult to know the exact value of Cin, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LM C 660 and LM C662 for a more detailed discussion on compensating for input ca­

pacitance.

Cf

FIGURE 1. Cancelling the Effect of Input Capacitance CAPACITIVE LOAD TOLERANCE

All rail-to-rail output swing operational amplifiers have volt­

age gain in the output stage. A compensation capacitor is normally included in this integrator stage. The frequency lo­

Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-am p’s output impedance and the capacitive load. This pole induces phase lag at the unity- gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2a.

+v

T L /H /11467-5

FIGURE 2a. LMC6084 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 2a, R1 and C 1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s in­

verting input, thereby preserving phase margin in the overall feedback loop.

Capacitive load driving capability is enhanced by using a pull up resistor to V + (Figure 2b). Typically a pull up resistor conducting 500 jmA or more will significantly improve capaci­

tive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics).

v+

T L /H /11467-6

FIGURE 2b. Compensating for Large Capacitive Loads with a Pull Up Resistor

PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK

It is generally recognized that any circuit which must oper­

ate with less than 1000 pA of leakage current requires spe­

cial layout of the PC board. When one wishes to take advan­

tage of the ultra-jow bias current of the LM C6084, typically

M C 6 0 8 4

(8)

L M C 6 0 8

Applications Hints

(Continued)

leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable.

To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LM C 6084’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp’s inputs, as in Fig­

ure 3. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage cur­

rent can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012ft, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 100 times degradation from the LM C 6084’s actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011f t would cause only 0.05 pA of leakage current. See Figures 4a, 4b, 4c for typical connections of guard rings for standard op-amp configurations.

TL/H /11467-7

FIGURE 3. Example of Guard Ring in P.C. Board Layout

C1

(a) Inverting Amplifier

R2

TL/H /11467-9

(b) Non-Inverting Amplifier

OUTPUT

TL/H /11467-10

FIGURE 4. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board con­

struction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Fig­

ure 5.

(9)

Latchup

C M O S devices tend to be susceptible to latchup due to their internal parasitic SCR effects. The (I/O ) input and output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LM C6084 is designed to withstand 100 mA surge current on the I/O pins. Som e resistive method should be used to isolate any capacitance from supplying excess current to the I/O pins.

In addition, like an SCR, there is a minimum holding current for any latchup mode. Limiting current to the supply pins will also inhibit latchup susceptibility.

FEEDBACK CAPACITOR

(Input pins are lifted out of PC board and soldered directly to components.

All other pins connected to PC board).

FIGURE 5. Air Wiring

Typical Single-Supply Applications

(V + = 5.0 V DC)

The extremely high input impedance, and low power con­

sumption, of the LM C 6084 make it ideal for applications that require battery-powered instrumentation amplifiers. Exam­

ples of these types of applications are hand-held pH probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers.

Figure 6 shows an instrumentation amplifier that features high differential and common mode input resistance (> 1 0 1 4 0 ), 0.01% gain accuracy at Ay = 1000, excellent CM RR with 1 k ft imbalance in bridge source resistance.

Input current is less than 100 fA and offset drift is less than 2.5 juA//°C. R2 provides a simple means of adjusting gain over a wide range without degrading CMRR. R7 is an initial trim used to maximize C M RR without using super precision matched resistors. For good C M RR over temperature, low drift resistors should be used.

If R-| = R5, R3 = R6, and R4 = R7; then

TL/H/11467-12

Vqut = ^ 2 + 2 Rj x R4

V|N R2 R3

.'.Av ~ 100 for circuit shown (R2 = 9.822k).

FIGURE 6. Instrumentation Amplifier

M C 6 0 8 4

(10)

L M C 6 0 8

Typical Single-Supply Applications <v+ = 5.0 vDC) (continued)

T L/H /1 1467-13

FIGURE 7. Low-Leakage Sample and Hold

R4

TL/H /11467-14

FIGURE 8.1 Hz Square Wave Oscillator

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