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74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
May 2007
74VHC221A
Dual Non-Retriggerable Monostable Multivibrator
Features
■ High Speed: tPD= 8.1ns (Typ.) at VCC= 5V
■ Low Power Dissipation: ICC= 4µA (Max.) at TA= 25°C
■ Active State: ICC= 600µA (Max.) at TA= 25°C
■ High Noise Immunity: VNIH= VNIL= 28% VCC (Min.)
■ Power down protection is provided on all inputs
■ Pin and function compatible with 74HC221A
General Description
The VHC221A is an advanced high speed CMOS Monostable Multivibrator fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while main- taining the CMOS low power dissipation. Each multi- vibrator features both a negative, A, and a positive, B, transition triggered input, either of which can be used as an inhibit input. Also included is a clear input that when taken LOW resets the one-shot. The VHC221A can be triggered on the positive transition of the clear while A is held LOW and B is held HIGH. The VHC221A is non- retriggerable, and therefore cannot be retriggered until the output pulse times out. The output pulse width is determined by the equation:
PW = (Rx)(Cx) where,
PW is in seconds, R is in ohms, and C is in farads.
Limits for Rx and Cx are:
External capacitor, Cx: No limit
External resistors, Rx: VCC = 2.0V, 5kΩ Min.
VCC> 3.0V, 1 kΩ Min
An input protection circuit ensures that 0 to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mis- matched supply and input voltages.
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
Package
Number Package Description
74VHC221AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC221ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC221AMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC221A Rev. 1.2 2
Connection Diagram
Logic Symbol
IEEE/IEC
Truth Table
H = HIGH Voltage Level L = LOW Voltage Level
= HIGH-to-LOW Transition
= LOW-to-HIGH Transition X = Don’t Care
Block Diagrams
Note A: Cx, Rx, Dx are external Capacitor, Resistor, and Diode, respectively.
Note B: External clamping diode, Dx;
External capacitor is charged to VCC level in the wait state, i.e. when no trigger is applied.
If the supply voltage is turned off, Cx discharges mainly through the internal (parasitic) diode. If Cx is sufficiently large and VCC drops rapidly, there will be some possibil- ity of damaging the IC through in rush current or latch- up. If the capacitance of the supply voltage filter is large enough and VCC drops slowly, the in rush current is automatically limited and damage to the IC is avoided.
The maximum value of forward current through the para- sitic diode is ±20 mA. In the case of a large Cx, the limit of fall time of the supply voltage is determined as follows:
tf≥ (VCC – 0.7) Cx / 20mA
(tf is the time between the supply voltage turn off and the supply voltage reaching 0.4 VCC)
In the event a system does not satisfy the above condi- tion, an external clamping diode (Dx) is needed to protect the IC from rush current.
Inputs Outputs
Function A B CLR Q Q
H H Output Enable
X L H L H Inhibit
H X H L H Inhibit
L H Output Enable
L H Output Enable
X X L L H Reset
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator System Diagram
Timing Chart
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC221A Rev. 1.2 4
Functional Description
1. Stand-by State
The external capacitor (Cx) is fully charged to VCC in the Stand-by State. That means, before triggering, the QP and QN transistors which are connected to the Rx/Cx node are in the off state. Two comparators that relate to the timing of the output pulse, and two refer- ence voltage supplies turn off. The total supply cur- rent is only leakage current.
2. Trigger Operation
Trigger operation is effective in any of the following three cases. First, the condition where the A input is LOW, and B input has a rising signal; second, where the B input is HIGH, and the A input has a falling sig- nal; and third, where the A input is LOW and the B input is HIGH, and the CLR input has a rising signal.
After a trigger becomes effective, comparators C1 and C2 start operating, and QN is turned on. The external capacitor discharges through QN. The volt- age level at the Rx/Cx node drops. If the Rx/Cx volt- age level falls to the internal reference voltage VrefL, the output of C1 becomes LOW. The flip-flop is then reset and QN turns off. At that moment C1 stops but C2 continues operating.
After QN turns off, the voltage at the Rx/Cx node starts rising at a rate determined by the time constant of external capacitor Cx and resistor Rx.
Upon triggering, output Q becomes HIGH, following some delay time of the internal F/F and gates. It stays HIGH even if the voltage of Rx/Cx changes from fall- ing to rising. When Rx/Cx reaches the internal refer- ence voltage VrefH, the output of C2 becomes LOW, the output Q goes LOW and C2 stops its operation.
That means, after triggering, when the voltage level of the Rx/Cx node reaches VrefH, the IC returns to its MONOSTABLE state.
With large values of Cx and Rx, and ignoring the dis- charge time of the capacitor and internal delays of the IC, the width of the output pulse, tW (OUT), is as follows:
tW (OUT) = 1.0 Cx Rx 3. Reset Operation
In normal operation, the CLR input is held HIGH. If CLR is LOW, a trigger has no affect because the Q output is held LOW and the trigger control F/F is reset. Also, Qp turns on and Cx is charged rapidly to VCC.
This means if CLR is set LOW, the IC goes into a wait state.
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Recommended Operating Conditions
(1)The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Notes:
1. Unused inputs must be held HIGH or LOW. They may not float.
2. The maximum allowable values of Cx and Rx are a function of the leakage of capacitor Cx, the leakage of the device, and leakage due to board layout and surface resistance.
Susceptibility to externally induced noise signals may occur for Rx > 1 MΩ.
Symbol Parameter Rating
VCC Supply Voltage –0.5V to +7.0V
VIN DC Input Voltage –0.5V to +7.0V
VOUT DC Output Voltage –0.5V to VCC + 0.5V
IIK Input Diode Current –20mA
IOK Output Diode Current ±20mA
IOUT DC Output Current ±25mA
ICC DC VCC/ GND Current ±50mA
TSTG Storage Temperature –65°C to +150°C
TL Lead Temperature (Soldering, 10 seconds) 260°C
Symbol Parameter Rating
VCC Supply Voltage 2.0V to +5.5V
VIN Input Voltage 0V to +5.5V
VOUT Output Voltage 0V to VCC
TOPR Operating Temperature –40°C to +85°C
tr, tf Input Rise and Fall Time (CLR only) VCC= 3.3V ± 0.3V
VCC= 5.0V ± 0.5V
0ns/V ∼ 100ns/V 0ns/V ∼ 20ns/V
External Capacitor, Cx No Limitation(2) F
External Resistor, Rx >5kΩ(2) (VCC= 2.0V)
>1kΩ(2) (VCC> 3.0V)
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC221A Rev. 1.2 6
DC Electrical Characteristics
Note:
3. Per circuit.
Symbol Parameter VCC (V) Conditions
TA= 25°C TA= –40° to 85°C Units
Min. Typ. Max. Min. Max.
VIH HIGH Level Input Voltage
2.0 1.50 1.50 V
3.0–5.5 0.7 x VCC 0.7 x VCC
VIL LOW Level Input Voltage
2.0 0.50 0.50 V
3.0–5.5 0.3 x VCC 0.3 x VCC
VOH HIGH Level Output Voltage
2.0 VIN= VIH or VIL
IOH= –50µA 1.9 2.0 1.9 V
3.0 2.9 3.0 2.9
4.5 4.4 4.5 4.4
3.0 IOH= –4mA 2.58 2.48
4.5 IOH= –8mA 3.94 3.80
VOL LOW Level Output Voltage
2.0 VIN= VIH or VIL
IOL= 50µA 0.0 0.1 0.1 V
3.0 0.0 0.1 0.1
4.5 0.0 0.1 0.1
3.0 IOL= 4mA 0.36 0.44
4.5 IOL= 8mA 0.36 0.44
IIN Input Leakage Current
0–5.5 VIN= 5.5V or GND ±0.1 ±1.0 µA
IIN Rx/Cx Terminal Off-State Current
5.5 VIN= VCC or GND ±0.25 ±2.50 µA
ICC Quiescent Supply Current
5.5 VIN= VCC or GND 4.0 40.0 µA
ICC Active—State(3) Supply Current
3.0 VIN= VCC or GND, Rx/Cx = 0.5 VCC
160 250 280 µA
4.5 380 500 650
5.5 560 750 975
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator AC Electrical Characteristics
(4)Notes:
4. Refer to 74VHC221A Timing Chart.
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation:
ICC (opr.) = CPD • VCC • fIN + ICC1 • Duty / 100 + ICC / 2 (per Circuit) ICC1: Active Supply Current
Duty: %
AC Operating Requirement
Symbol Parameter VCC (V) Conditions
TA= 25°C
TA= –40°C to +85°C
Units Min. Typ. Max. Min. Max.
tPLH, tPHL Propagation Delay Time (A, B–Q, Q)
3.3 ± 0.3 CL = 15pF 13.4 20.6 1.0 24.0 ns
CL= 50pF 15.9 24.1 1.0 27.5
5.0 ± 0.5 CL = 15pF 8.1 12.0 1.0 14.0 ns
CL = 50pF 9.6 14.0 1.0 16.0
tPLH, tPHL Propagation Delay Time (CLR Trigger—Q, Q)
3.3 ± 0.3 CL = 15pF 14.5 22.4 1.0 26.0 ns
CL= 50pF 17.0 25.9 1.0 29.5
5.0 ± 0.5 CL = 15pF 8.7 12.9 1.0 15.0 ns
CL = 50pF 10.2 14.9 1.0 17.0
tPLH, tPHL Propagation Delay Time (CLR—Q, Q)
3.3 ± 0.3 CL= 15pF 10.3 15.8 1.0 18.5 ns
CL = 50pF 12.8 19.3 1.0 22.0
5.0 ± 0.5 CL = 15pF 6.3 9.4 1.0 11.0 ns
CL= 50pF 7.8 11.4 1.0 13.0
tWOUT Output Pulse Width 2.0 CX = 28pF, CL = 50pF,
RX= 6kΩ 415
3.3 ± 0.3 345 ns
5.0 ± 0.5 312
3.3 ± 0.3 CL= 50pF, Cx = 28pF, Rx = 2kΩ
160 240 300 ns
5.0 ± 0.5 133 200 240
3.3 ± 0.3 CL = 50pF, Cx = 0.01µF, Rx = 10kΩ
90 100 110 90 110 µs
5.0 ± 0.5 90 100 110 90 110
3.3 ± 0.3 CL = 50pF, Cx = 0.1µF,
Rx = 10kΩ 0.9 1.0 1.1 0.9 1.1 ms
5.0 ± 0.5 0.9 1.0 1.1 0.9 1.1
∆twOUT Output Pulse Width Error Between Circuits (In same Package)
±1 %
CIN Input Capacitance VCC= Open 4 10 10 pF
CPD Power Dissipation Capacitance
(5) 73 pF
Symbol Parameter V
CC(V)
T
A=25°C T
A=–40°C to +85°C
Units Min. Typ. Max. Min. Max.
tW(L) Minimum Trigger 3.3 5.0 5.0 ns
tW(H) Pulse Width 5.0 5.0 5.0
tW(L) Minimum Clear Pulse Width 3.3 5.0 5.0 ns
5.0 5.0 5.0
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC221A Rev. 1.2 8
Device Characteristics
twout*Cx Characteristics (Typ.)
Output Pulse Width Constant K-Supply Voltage (Typical)
Input Equivalent Circuit
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC221A Rev. 1.2 10
Physical Dimensions
(Continued)Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator Physical Dimensions
(Continued)Dimensions are in millimeters unless otherwise noted.
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
4.4±0.1 0.65
MTC16rev4 0.11
4.55
5.00 5.00±0.10
12°
7.35 4.45
1.45
5.90
74VHC221A Dual Non-Retrig g erab le Monostab le Multivibrator
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC221A Rev. 1.2 12
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PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
No Identification Needed Full Production First Production
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.
Rev. I26