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Gate oxide induced switch-on undershoot current observed

in thin-film transistors

Feng Yan,a兲 Piero Migliorato,b兲 and Yi Hong

Department of Engineering, Cambridge University, Trumpington Street, Cambridge CB2 1PZ, United Kingdom

V. Rana and R. Ishihara

Delft University of Technology, Delft Institute of Microelectronics and Submicrontechnology (DIMES), Laboratory of Electronic Components Technology and Materials (ECTM), Feldmannweg 17, 2600 GB Delft, The Netherlands

Y. Hiroshima, D. Abe, S. Inoue, and T. Shimoda

Technology Platform Research Center, Seiko Epson Corporation, 281 Fujimi, Fujimi-machi, Suwa-gun, Nagano-ken 399-0293, Japan

共Received 18 November 2004; accepted 23 May 2005; published online 15 June 2005兲

The transient drain current of the single-grain silicon thin-film transistor with gate oxide deposited by electron cyclotron resonance plasma-enhanced chemical vapor deposition has been measured by applying a square signal on the gate and a constant low voltage between source and drain. Switch-on undershoot current has been observed, which can be attributed to the motion of space charge in gate oxide. Assuming there are some mobile ions in the gate oxide, we find the drift kinetics of the ions is quite similar to the mobile protons in SiO2, as reported in the literature. © 2005 American

Institute of Physics. 关DOI: 10.1063/1.1954896兴

The technology of low-temperature polycrystalline sili-con thin-film transistors 共poly-Si TFT兲, fabricated by exci-mer laser recrystallization on a glass or plastic substrate, is being pursued to achieve the so-called system-on-panel.1,2A new development in TFT technology is the fabrication of location-controlled single-grain silicon TFTs 共SG-TFTs兲 by the method referred to as micro-Czochralski or gain filter process.3–5Much higher electron mobilities than for standard laser-crystallized poly-Si TFTs are obtained with SG-TFTs 共450 cm2/ V s兲. By exploiting the capability of this technol-ogy to take on many functions traditionally reserved for single-crystal devices, it is expected that a complete com-puter system will be fabricated on a glass or plastic substrate. In view of these applications, characterization of the tran-sient behavior of SG-TFTs is of paramount importance for the optimum design of electronic circuits.

To improve the performance of the SG-TFTs, two differ-ent fabrication processes for the gate oxide have been used: low-pressure chemical vapor deposition共LPCVD兲 and elec-tron cycloelec-tron resonance plasma-enhanced chemical vapor deposition 共ECR-PECVD兲. We found that the devices with ECR-PECVD oxide have a better Si/ SiO2 interface and higher field-effect mobility.5The transient properties of these devices have been studied carefully. We have reported before that SG-TFTs with LPCVD oxide exhibit a switch-on over-shoot 共that is, the transient drain current after switch-on兲 higher than the static value. The effect has been attributed to trapping in the bulk or in the interface.6–8 By contrast, in devices with ECR-PECVD oxide, a different transient effect has been observed. The transient drain current after switch-on is lower than the static value. We refer to this effect as “undershoot.” The purpose of this work is to under-stand the physical origin of the “undershoot.”

The n-channel SG-TFTs were fabricated inside location-controlled grains by the micro-Czochralski process.3 After formation of the location-controlled grains, the Si film was patterned into islands by dry etching. A 137 nm thick SiO2 film was deposited by the ECR-PECVD at room temperature to serve as the gate dielectric. Microwaves with a frequency of 2.45 GHz, parallel to the magnetic field lines, were intro-duced to the chamber via a quartz window. SiH4and O2were used as source gases and the pressure was kept at 1 mTorr. The SiO2 was successively annealed at 333 ° C in H2O / N2 ambient. The gate electrode was Al. The channel length and width were measured to be 3.21 and 2.88␮m, respectively. Control devices with ECR-PECVD gate oxide were fabri-cated on undoped兵100其-oriented silicon-on-insulator 共SOI兲, with the rest of the process being identical to that of the SG-TFTs.

The transient measurement setup has been reported before.6,7As shown in Fig. 1, a train of pulses was applied to the gate by an Agilent 33250A wave form generator. The source was grounded and a constant voltage 共VDS= 0.1 V兲 was applied to the drain by a Keithley 230 voltage source. The transient current was amplified by a Keithley 428 cur-rent voltage converter and detected by a LC584AL digital oscilloscope. The output signal was averaged over 1000 pe-riods to reduce the noise. The pulse rise time was set to 20 ns, chosen to be comparable with those typically used in TFT digital circuitry. All of the measurements were con-trolled through LABVIEW. The transient measurements were

a兲Electronic mail: fy206@eng.cam.ac.uk

b兲

Electronic mail: pm@eng.cam.ac.uk FIG. 1. Wave form used in the transient measurements.

APPLIED PHYSICS LETTERS 86, 253504共2005兲

0003-6951/2005/86共25兲/253504/3/$22.50 86, 253504-1 © 2005 American Institute of Physics

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carried out on SG-TFTs with a typical field-effect mobility of 400 cm2/ V s. A square wave form 共VGS-max− Voff兲 was ap-plied to the gate. Voff= 0 and VGS-maxwas varied between 1.5 and 9.0 V. The on time and off time were 0.5 s.

As shown in Fig. 2共a兲, the drain current after switch-on increases with time until it reaches the static value 共under-shoot兲. The transient current can be fitted to the following expression:

IDS共t兲 = Istatic−⌬I1exp共− t/␶1兲 − ⌬I2exp共− t/␶2兲, 共1兲 where Istatic is the static value, and⌬I1and ⌬I2 are the un-dershoot values for the two relaxation times ␶1 and ␶2, re-spectively. ␶1 corresponds to the faster relaxation process, which is tens of milliseconds long, and␶2 corresponds to a slower process lasting hundreds of milliseconds. Figure 3 shows that the relaxation time␶2decreases with the increase of VGS-max.

As shown in Fig. 2共b兲, the undershoot current of SOI TFTs exhibits a similar relaxation time constant␶2 of about hundreds of milliseconds. Figure 3 shows the relaxation time

␶2as a function of VGS-max. This is a strong indication that the undershoot is due to the ECR-PECVD gate oxide.

The undershoot implies that the number of electrons in the channel increases with time after switch-on. If we assume that there are mobile space charges in the gate oxide, the effect on the channel electron density is described by

VGS= 1 ␧r␧0

兵兩Qc兩d − 兩Q+兩c++兩Q兩c−其 + ⌿s, 共2兲 where␧ris the relative dielectric constant of the gate oxide, Qcis the channel charge density per unit area, Q+and Qare the positive and negative charge density per unit area in the oxide film, respectively, c+ and c− are the distances of the centroids of positive and negative charge from the metal

gate/insulator interface, respectively, d is the thickness of the gate oxide, and␺s is the surface potential. Equation共2兲 in-dicates that the change of space charge density or the motion of space charge in the oxide can influence the electron den-sity in the channel. The first case corresponds to space charge injection from the gate metal or the channel, the second case can be regarded as dielectric relaxation of the oxide film. In the case of space charge injection, two types of processes may occur with positive VGS: electron injection from the channel, which would result in a lower channel electron den-sity, and hole injection from the gate metal that would give rise to higher channel electron density and consequently higher drain current. Hence, the undershoot could be due to hole injection from the gate. However, hole injection from the metal gate due to Schottky emission or Poole-Frenkel emission9 is expected to yield a nonlinear relationship be-tween the injection current and the applied electric field. By contrast, as shown in Figs. 2共a兲 and 2共b兲, the undershoot value depends linearly on the applied gate voltage. We con-sider next the motion of space charge in the oxide. When a positive gate voltage is applied, positive charges move away from the gate and/or negative charges move toward gate; therefore c+increases and/or c−decreases. According to Eq. 共2兲, this results in an increase of electron density in the chan-nel, and the undershoot.

To further understand the undershoot current, we do the variable temperature measurements on the SG-TFT in the temperature range between 220 and 350 K. We find the re-laxation time␶2 decreases with the increase of temperature and shows a thermal activation behavior: ␶2⬀exp共⌬E/kT兲 with an activation energy of⌬E1⬇0.08 meV. However, the undershoot current corresponds to a very complicated pro-cess. Assuming it is induced by the diffusion of space charge in the gate oxide,␶2 would be influenced by both the

diffu-FIG. 3. The relaxation time␶2 as a function of VGS-max. Symbols: round

共SG-TFT兲, square 共SOI-TFT兲.

FIG. 4. Logarithmic plot of 兩dId/ dtt→0 vs temperature of a 3.2␮m

⫻2.9␮m n-channel SG-TFT. VDS= 0.1 V and VGS= 8.0 V. The best fitting

dashed line is shown. The activation energy⌬E=0.32 eV. FIG. 2. 共a兲 Undershoot current observed in a 3.2␮m⫻2.9␮m n-channel

SG-TFT. VDS= 0.1 V. From top to bottom, VGS-maxvaries from 8.5 to 1.5 V.

Voff= 0 V. Inset: The undershoot value⌬I 关兩IDS共t=20 ns兲−IDS共t=0.5 s兲兩兴 for

different VGS-max.共b兲 Undershoot current observed in a 1.8␮m⫻2.0␮m

n-channel SOI-TFT. VDS= 0.1 V, Voff= 3 V. Inset: The undershoot value⌬I

for different VGS-max.

253504-2 Yanet al. Appl. Phys. Lett. 86, 253504共2005兲

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sion rate and the distribution of space charge in the oxide. Another alternative approach is to calculate the drain current change at the beginning of switch-on: 兩dId/ dtt→0. Assuming there are only positive mobile charges in the gate oxide, we have dId/兩dtt→0= −共W/L兲CoxnVdsdVt/dt, 共3兲 dVt/dt = 1 ␧0␧r Q+␯共T兲 = 1 ␧0␧r Q+Rfi/␶+, 共4兲 where Vt is the threshold voltage of the device, ␮n is the field-effect mobility of electrons in the channel, Rfi is the hopping distance, and 1 /␶H is the hopping rate of positive charge. Thus, 兩dId/ dtt→0is proportional to the hopping rate. As shown in Fig. 4, 兩dId/ dtt→0exhibits a thermal activation process with the activation energy of⌬E2⬇0.32 eV.

To confirm the mechanism of undershoot current dis-cussed earlier, we have fabricated metal oxide semiconductor 共MOS兲 devices with ECR-PECVD oxide and LPCVD oxide on p-type Si wafer with NA= 1016cm−3. The oxide layers were fabricated with the same process as SG-TFTs. The thicknesses of ECR-PECVD and LPCVD oxide films are 126.2 and 131.5 nm, respectively. The C-V curves of these devices have been measured at different frequencies. The devices with ECR-PECVD oxide show unstable flatband voltage, whereas the LPCVD oxide ones show a very stable flatband. Thus, we conclude that the space charge motion in the ECR-PECVD oxide film is responsible for the variation of the flatband voltage.

Figure 5 shows the calculated dielectric constants of the two films as a function of frequency extracted from the

ca-pacitance measured at VG= −10 V共accumulation condition兲. The ECR-PECVD oxide has a much higher dielectric con-stant and a large frequency dispersion, which is due to the space charge relaxation in the oxide.10,11Therefore, the MOS

C-V measurements versus frequency are consistent with the

transient measurements in the SG-TFTs.

It is difficult to decide the nature of the space charge in our ECR-PECVD oxide films from the measurements de-scribed earlier. Since the undershoot value is proportional to the applied voltage, the effect can be due to the relaxation of dipoles formed by impurity ions in the oxide film11 or the drift of ions/localized charges. A similar drain current relax-ation lasting hundreds of milliseconds has been observed in SOI MOS field-effect transistor by Vanheusden et al.12This relaxation has been attributed to the drift of protons in the gate dielectric. The activation energy for 兩dId/ dtt→0we ob-tain in our measurement共⬃0.32 eV兲 is much lower than the value Vanheusden et al.12 reported 共⬃0.82 eV兲, while it is quite similar to the value Devine et al.13 obtained 共⬃0.38 eV兲. We expect that protons can be easily introduced in our SiO2 films during deposition or annealing. Thus, the undershoot current we observed in SG-TFTs could be due to the drift of protons in the gate oxide.

This work was funded by Seiko-Epson.

1

T. Sameshima, S. Usui, and M. Sekiya, IEEE Electron Device Lett. 7, 276

共1986兲.

2

T. Shimoda and S. Inoue, 1999 International Electron Device Meeting Digest 1999, 289.

3

R. Ishihara, P. C. Wilt, B. D. Dijk, A. Burtsev, F. C. Voogt, G. J. Bertens, J. W. Metselaar, and C. I. M. Beenakker, Proc. SPIE 4295, 14共2001兲.

4

P. Ch. Van der Wilt, B. D. van Dijk, G. J. Bertens, R. Ishihara, and C. I. M. Beenakker, Appl. Phys. Lett. 72, 1819共2001兲.

5

R. Ishihara, Y. Hiroshima, D. Abe, B. D. van Dijk, P. Ch. van der Wilt, S. Higashi, S. Inoue, T. Shimoda, J. W. Metselaar, and C. I. M. Beenakker, IEEE Trans. Electron Devices 51, 500共2004兲.

6

N. Bavidge, M. Boero, P. Migliorato, and T. Shimoda, Appl. Phys. Lett.

77, 3836共2000兲.

7

F. Yan, P. Migliorato, N. Bavidge, and R. Ishihara, Proc. ECS, 2002, p. 75.

8

F. Yan, P. Migliorato, and T. Shimoda, Appl. Phys. Lett. 82, 2062共2003兲.

9

S. M. Sze, Physics of Semiconductor Devices共Wiley, New York, 1981兲.

10

A. K. Jonscher, Dielectric Relaxation in Solids共Chelsea Dielectrics, Lon-don, 1983兲.

11

S. Holten and H. Kliem, J. Appl. Phys. 93, 1684共2003兲.

12

K. Vanheusden, W. L. Warren, R. A. B. Devine, D. M. Fleetwood, J. R. Schwank, M. R. Shaneyfelt, P. S. Winokur, and Z. J. Lemnios, Nature

共London兲 386, 587 共1997兲.

13

R. A. B. Devine and G. V. Herrera, Phys. Rev. B 63, 233406共2001兲. FIG. 5. The dielectric constant of ECR-PECVD and LPCVD oxides in MOS

devices deduced from capacitance measurements vs frequency at VG

= −10 V. The top electrode is Al.

253504-3 Yanet al. Appl. Phys. Lett. 86, 253504共2005兲

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