N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR
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TYPICAL R
DS(on)= 0.23 Ω
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AVALANCHE RUGGED TECHNOLOGY
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100% AVALANCHE TESTED
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REPETITIVE AVALANCHE DATA AT 100
oC
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LOW GATE CHARGE
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HIGH CURRENT CAPABILITY
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175
oC OPERATING TEMPERATURE
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APPLICATION ORIENTED CHARACTERIZATION
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THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX ”-1”)
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SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX ”T4”)
APPLICATIONS
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HIGH CURRENT, HIGH SPEED SWITCHING
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SOLENOID AND RELAY DRIVERS
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REGULATORS
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DC-DC & DC-AC CONVERTERS
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MOTOR CONTROL, AUDIO AMPLIFIERS
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AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Val ue Uni t
VDS Drain-source Voltage (VGS = 0) 100 V
VDGR Drain- gate Voltage (RG S= 20 kΩ) 100 V
VGS Gate-source Voltage ± 20 V
ID Drain Current (continuous) at Tc= 25oC 9 A
ID Drain Current (continuous) at Tc= 100 oC 6 A
IDM(•) Drain Current (pulsed) 36 A
Pt ot Total Dissipation at Tc= 25oC 45 W
Derat ing Factor 0.3 W/oC
TYPE VDSS RDS(on) ID
ST D9N10 100 V < 0.27Ω 9 A
3 2 1
IPAK TO-251 (Suffix ”-1”)
1 3
DPAK TO-252
(Suffix ”T4”)
THERMAL DATA
Rt hj-ca se
Rt hj- amb
Rthc- si nk
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead T emperature For Soldering Purpose
3.33 100 1.5 275
oC/W
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symb ol Parameter Max Valu e Uni t
IAR Avalanche Current , Repet itive or Not -Repetitive (pulse widt h limited by Tjmax,δ < 1%)
9 A
EAS Single Pulse Avalanche Energy
(starting Tj= 25oC, ID= IAR, VDD= 25 V)
30 mJ
EAR Repetit ive Avalanche Energy
(pulse widt h limited by Tjmax,δ < 1%)
7 mJ
IAR Avalanche Current , Repet itive or Not -Repetitive (Tc= 100oC, pulse width limited by Tjmax, δ < 1%)
6 A
ELECTRICAL CHARACTERISTICS (T
case= 25
oC unless otherwise specified) OFF
Symb ol Parameter Test Cond ition s Mi n. Typ . Max. Un it
V(BR)DSS Drain-source Breakdown Volt age
ID= 250 µA VG S= 0 100 V
IDSS Zero Gat e Voltage Drain Current (VGS= 0)
VDS= Max Rating
VDS= Max Rating x 0. 8 Tc= 125oC
250 1000
µA µA IGSS Gate-body Leakage
Current (VDS = 0)
VG S =± 20 V ± 100 nA
ON ( ∗ )
Symb ol Parameter Test Cond ition s Mi n. Typ . Max. Un it
VGS(th) Gate T hreshold Voltage VDS= VGS ID= 250µA 2 3 4 V
RDS( on) St atic Drain-source On Resistance
VG S = 10V ID= 4.5 A
VG S= 10V ID= 4.5 A Tc= 100oC
0. 23 0.27 0.54
ΩΩ
ID(o n) On Stat e Drain Current VDS> ID(on)x RDS(on) max
VG S= 10 V
9 A
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symb ol Parameter Test Cond ition s Mi n. Typ . Max. Un it
td(on) tr
Turn-on T ime Rise Time
VDD= 50 V ID= 4.5 A RG= 4.7 Ω VGS= 10 V (see t est circuit, figure 3)
10 40
15 60
ns ns
(di/ dt)on Turn-on Current Slope VDD= 80 V ID= 9 A RG= 4.7 Ω VGS= 10 V (see t est circuit, figure 5)
440 A/µs
Qg
Qgs
Qgd
Total Gat e Charge Gate-Source Charge Gate-Drain Charge
VDD = 80 V ID= 9 A VGS= 10 V 15 6 5
25 nC
nC nC
SWITCHING OFF
Symb ol Parameter Test Cond ition s Mi n. Typ . Max. Un it
tr(Vof f)
tf
tc
Of f-voltage Rise Time Fall T ime
Cross-over T ime
VDD= 80 V ID= 9 A RG= 4.7 Ω VG S = 10 V (see t est circuit, figure 5)
15 25 50
25 35 70
ns ns ns
SOURCE DRAIN DIODE
Symb ol Parameter Test Cond ition s Mi n. Typ . Max. Un it
ISD
ISDM(•)
Source-drain Current Source-drain Current (pulsed)
9 36
A A
VSD(∗) Forward O n Volt age ISD = 9 A VGS = 0 1.5 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD= 9 A di/dt = 100 A/µs VDD = 20 V Tj = 150oC (see t est circuit, figure 5)
80
0.2
5
ns
µC A
(∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized On Resistance vs Temperature
Turn-off Drain-source Voltage Slope
Normalized Gate Threshold Voltage vs Temperature
Turn-on Current Slope
Cross-over Time
Switching Safe Operating Area
Source-drain Diode Forward Characteristics
Fig. 1: Unclamped Inductive Load Test Circuit
Accidental Overload Area
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching And DIode Recovery Times
Fig. 4: Gate Charge test Circuit
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370
L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039
A C2 C A3
H
A1
TO-251 (IPAK) MECHANICAL DATA
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.9 0.025 0.035
B2 5.2 5.4 0.204 0.212
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 9.35 10.1 0.368 0.397
L2 0.8 0.031
L4 0.6 1 0.023 0.039
==
L2 D
13
== B
E ==B2 G2
A C2 C
H
A1DETAIL ”A”
A2
DETAIL ”A”
