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Companding Baseband Circuits

for Wireless Communications

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Stellingen behorende bij het proefschrift

Companding Baseband Circuits for Wireless Communications

Vaibhav Maheshwari

1. Companding reduceert het dynamisch bereik van een systeem tot het vereiste minimum voor betrouwbarecommunicatie. [Hoofdstuk 2 van dit proefschrift]

2. SC filters zijn superieur ten opzichte van hun continue-tijd tegenhangers voor wat betreft de toepass ing van compandi ng omdat we de signalen tussen klokcycli kunnen waarnemen , kunnen bewerken en de scha kelin-gendie de signaalverwer king dynamisch uit voeren kunnenoptimaliseren . [Hoofdstuk 2 van dit proefschrift]

3. Het voorvervorming-en-linearisatie proces in een companding SC filter is immuun voor proces-, temperatuur- en spannings-variaties zolang de companderende functie goed gedefinieerd blijft. Het is alleen gevoelig voor mismatch en circuit-parasieten. [Hoofdstuk 4 van dit proefschrift] 4. Het gebruik van off-line digitale kalibratie voor minimalisatie van DC

offset in OTA's resulteert in een betere prestatie en verbruikt minder chipoppervlak dan on-chip autozeroing technieken wanneer toegepast op companding SC filters. [Hoofstukken 4 en 5 van dit proefschrift]

5. Syllabische companding zal automatische volumeregeling in draadloze ontvangers niet vervangen omdat de eigenschappen van het fysieke ka-naai ongeveer constant blijven voor de tijdsduur dat de datapakketten worden verzonden. [Hoofdstuk 5 van dit proefschrift]

6. Inst ant aa n companderende SC filters en ADCs kunnen in potentie lei-den tot een lager energieverbruik en een verminderd chipoppervlak in draadloze ontvangers in vergelijking met conventionele ADC's met ka-naai selectie in het digit aledomein. [Hoofdstuk6 van dit proefschrift] 7. Onderliggende circuit-technologieënmogen komen en gaan,maar de

dis-cipline van circuit-ontwerp zal altijd blijven bestaan.

8. Naast van iemands bekwaamheid, intuïtie en hard werken, zijn diens succes in onafhankelijk onderzoek ook afhankelijk van serendipiteit en begeleiding.

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9. Theoretische berekeningen en gesimuleerde resultaten blijven twijfelach-tig tot ze zijn gevalideerd door herhaalbare experimentele resultaten ("Nie-mand gelooft in theoretische berekeningen, behalve degene die het gedaan heeft. Iedereen gelooft in experimentele resultaten, behalve degene die het gedaan heeft - Albert Einstein).

10. Het doel van het leven is om bij te dragen aan de vooruitgang van de samenleving en te genieten van ieder geluk dat het leven ons te bieden heeft.

Dezestell ingen word en verd edi gbaar geacht en zijnals zodanig goedg ek eurddoor deprom ot or ,Prof. dr.J.R.Long.

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Propositions accompanying the thesis

Companding Baseband Circuits for Wireless

Communications

Vaibhav Maheshwari

1. Companding reduces the dynamic range of a system to the minimum required for reliable communication. [Chapter 2 of this thesis]

2. SC filters are superior to their continuous-time counterparts for the com-panding application as we can observe signals between clock cycles, pro-cess them and optimize the circuits performing the signal propro-cessing dy-namically. [Chapter 2 of this thesis]

3. The predistortion-linearization process in a companding SC filter is im-mune to process, temperature and voltage variations as long as the com-panding function remains well-defined. It is only sensitive to mismatch and circuit parasitics. [Chapter 4 of this thesis]

4. The use of off-line digital calibration for DC offset cancellation in OTAs results in better performance and consumes less chip area than on-chip

autozeroing techniques when applied to companding SC filters. [Chapter 4 and 5 of this thesis]

5. Syllabic companding will not replace automatic gain control in wireless receivers because the physical channel characteristics remain approxim-ately constant for the length of time that data packets are transmitted. [Chapter 5 of this thesis]

6. Instantaneously companding SC filters and ADCs could lead to lower power consumption and chip area when compared to conventional ADCs with digital channel selection in wireless receivers. [Chapter 6 of this thesis]

7. The underlying circuit technologies may come and go, but the discipline of circuit design will exist forever.

8. Apart from an individual's capability, intuition and hard work, success in independent research also depends on serendipity and guidance.

9. Theoretical calculations and simulated results remain questionable until they are validated by repeatable experimental results ("Nobody believes in theoretical calculations,except the one who did it. Everybody believes in experimental results, except the one who did it" - Albert Einstein).

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10. The purpose of life is to work for the advancement of the society and enjoy whatever happiness life affords us.

These propositions are considered defendab le and as such have been approved by the promotor, Prof. dr.J.R.Lon g.

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s

,-J

Companding Baseband Circuits

for Wireless Communications

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Companding Baseband Circuits

for Wireless Communications

PROEFSCHRlFT

ter verkrijging van de graad van doctor aan de Technische Universiteit Delft,

op gezag van de Rector Magnificus Prof.ir. K.C.A.M. Luyben, voorzitter van het College voor Promoties,

in het openbaar te verdedigen op donderdag, 20 januari 2011 om 10.00uur door Vaibhav MAHESHWARl

TU Delft Library

Prometheusplein 1

2628

ze

Delft

Master of Science ETH in Electrical Engineering and Information Technology, Swiss Federal Institute of Technology Zurich,

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Dit proefschrift is goedgekeurd door de promotor: Prof.dr. J. R. Long Samenstelling promotiecommissie: Rector Magnificus Prof.dr. J. R. Long Dr.ir. W.A.Serdijn Prof.dr.ir. F. E. van Vliet Prof.dr.ir. A.J. P. Theuwissen Prof.dr. P. M.Sarro

Dr. R. B. Staszewski Dr.ir. F.van der Goes Prof.dr. P. J. French

voorzitter

Technische Universiteit Delft, promotor Technische Universiteit Delft,copromotor Universiteit Twente

Technische Universiteit Delft Technische Universiteit Delft Technische Universiteit Delft Broadcom Inc., Bunnik

Technische Universiteit Delft,reservelid

Copyright

©

2011 by Vaibhav Maheshwari

All rights reserved. No part of the material protected by this copyright notice may be reproduced or utilized in any form or by any means,

electronic or mechanical,including photocopying, recording or by any information storage and retrieval system, without the prior permission of the author.

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Summary

Analog base band filters are one of the key components used in wire-less receivers for channel selection, i.e., to reject out of band signals be-fore analog-to-digital (AID) conversion. This relaxes the dynamic range (and therefore resolution) and speed requirements of the AID converter (ADC),which would otherwise have to oversample the entire input sig-nal containing large interferers. These asig-nalog filters have to maintain a minimum signal-to-noise and distortion ratio (SNDR) required by the specifications and on top of that they have to incorporate the often high dynamic range of the input signal to be processed. Thus, filters with very high dynamic range and high selectivity need to be designed,which necessitates high power consumption and large chip area. Low-power and low-cost designs are essential for the success of future portable wire-less applications. In order to design low-power circuits,it is important to reduce the input dynamic range associated with wireless signals to close to the minimum required SNDR at the output. This becomes even more important at low supply voltages since the signal-to-noise ratio (SNR) of analog baseband circuits in a wireless receiver is limited by the signal swing.

Automatic gain control (AGC) has been commonly used to reduce the dynamic range requirements of base band filters and ADCs but it has some limitations. Firstly, the AGC operation is based on the meas-ure ment of average signal power and thus it is not suitable for signals with high peak-to-average power ratio (PAP R). Secondly, the time al-lotted for AGC convergence and the presence of large interferers in the received signaI limits the maximum gain control that can be achieved. Instantaneous companding and syllabic companding can be utilized to overcome the above two shortcomings of AGC, respectively.

Compand-ing (compressingandexpanding) compresses a high dynamic range input

signal,processes it in a smaller dynamic range circuit or system and then expands it at the output. In instantaneous companding, the gain of the

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SUMMARY ii

system is changed dynamically based on the instantaneous value of the signal whereas in syllabic companding, the gain of the systemis changed according to a slowly varying characteristic of the signal suchas its root-mean-square (RMS) power or envelope.

There are several practical limitations in the design of compand-ing systems for wireless receivers. Mismatch,high-frequency effects and other circuit non-idealities cause distortion at the systemoutput. Com-panding technique can only be used when the dynamic requirements of the signal processor are set by the dynamic range of the desiredsignal and not the interferers. Some linear prefiltering might be needed otherwise and when the interferers cause high in-band second-order intermodula-tion distorintermodula-tion due to companding degrading the output SNDR of the desired signal, Moreover, the implementation of companding can make circuits very complex and may result in extra power consumption and chip area.

In this thesis, companding using switched-capacitor (SC) circuits is proposed to overcome the design challenges of implementing compand-ing in the baseband subsystem of a wireless receiver. We have used the IEEE 802.l1a WLAN communication system as the standard to apply and implement companding in the receiver baseband. Both types of companding, instantaneous and syllabic, are considered. As a proof-of-concept, a 10.5 MHz 5th-order Chebyschev low-pass switched-capacitor

(SC) filter is implemented using instantaneous companding by factor of 4 to handle 12 dB peak-to-average-power ratio (PAPR) of üFDM signal. The sampling frequency of the filter is 100 MHz. The filter achieves a signal-to-distortion ratio (SDR) greater than 34 dB, consumes 53 mW from a 1.2 V supply and has a dynamic range of 76.5 dB. For a 54Mbjs data rate and 64-QAM modulated üFDM signal, the EVMr ms is less

than 3.8% over a usable dynamic range of 20 dB. Using simulation res-ults, it is shown that instantaneous companding by factor of 4 reduces the power consumption and chip area of the filter by 4.3and 5.7times, re-spectively,whereas syllabic companding by factor of 4 reduces the power consumption and chip area of the filter by a factor between 5.8 and 9 times and between 9.4 and 7.4 times as compared to a non-companding SC filter designed for the same UDR. In both types of companding, the effect of mismatch is taken into account and the in-band interferers are considered. A combined companding baseband system is proposed in which the expansion of the signal is do ne in the digital domain. With the help of simulation results, it is shown the companding by factor of 4

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reduces the dynamic range requirements of the ADC by 12 dB without causing any penalty in the design and performance of the ADC. All the circuits presented in this thesis are designed in 1.2 V, 0.13 J.Lm CMOS technology.

Vaibhav Maheshwari Delft, July 2010

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Contents

Summary Contents iv v 1 1 4 6 10 13 13 15 17 20 22 22 26 27 29 30 31 31 32

Automatic gain control .

Dynamic gain and impedance sealing . Thesis outline . . . . . . . . Wireless receiver 1.1 1.2 1.3 IA Introduction

3 Companding in Wireless CommunicationSystems

3.1 Introduetion .

3.2 Evolution of S02.11a WLAN .

2 Companding

2.1 Introduetion .

2.2 Externally linear, internally nonlinearsystems .

2.2.1 Noise analysis .

2.2.2 Design challenges . . . . . . . 2.3 Companding in discrete-time domain 2.3.1 Instantaneous companding . .

2.3.2 Syllabic companding . . . . . 2.3.3 OTA's DC offset cancellation

204 Companding filter and ADC .

2.5 Summary . . . .

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CONTENTS

3.3 802.11a WLAN OFDM PHY key features 3.3.1 PLCP preamble .

3.3.2 DATA field . . . . 3.3.3 Time windowing . . . . 3.3.4 Receiver performance requirements 3.4 802.11a receiver link budget

3.5 Summary . . . . vi 32 35 36 36 37 38 39

4 Instantaneous Companding SC Filter 41

4.1 Introduetion . . . 41 4.2 Instantaneous companding SC filter implementation 41 4.3 OTA design . . . 43

4.3.1 Noise 43

4.3.2 Buffered Miller compensation . . . 44 4.3.3 OTA DC gain, UGBW, phase margin, slew rate

and CMFB . . . 46

4.4 DC offset cancellation in the OTA 50

4.5 Contral block . . 55

4.6 Clock generation 56

4.7 Switch design . . 57

4.8 Chip layout . . . 58

4.9 802.11a WLAN receiver chain 59

4.10 Measurement results 60

4.11 Summary . . . 72

5 Syllabic Companding SC Filter 73

5.1 Intraduction... . . . 73 5.2 802.11a WLAN receiver chain . . . 73 5.3 Syl1abic companding SC filter implementation 74

5.4 OTA's DC offset cancellation 76

5.5 Simulation Results 81

5.6 Summary . . . 85

6 Instantaneous Companding Baseband 87

6.1 Introduction... 87

6.2 Companding base band implementation . 87

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6.4 Summary

7 Conclusions

7.1 Summary of contributions

7.2 Outlook for future

Bibliography Samenvatting Acknowledgements Curriculum Vitae 91 93 96 96 99 111 115 117

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b::

l

I

nt roduet ion

Communication electronies is at the heart of the information age. In the past two decades, two areas fueled by communication electronies -the internet and -the wireless communications, are frequently referred to as technical and economie revolutions. These revolutions have been driven by data communications through both wired and wireless net-works

[11.

Of the two networks, wireless communieation uses the radio medium,whieh is one of the most hostile environments for signal trans-mission. This environment is characterized by drastie attenuation of the transmitted signal, multipath fading and the addition of noise and large interfering signals. As a result, wireless receiver design focuses on amplification to restore the signal level, noise and linearity to minimize degradation of signal quality and, final1y, filtering to select the desired signals, From an economie point of view, commercial wireless produets should be low-cost, low-power and portable. As the end produets are for everyday use, the price, size and weight of the devices play an important role in determining their design. Cost reduction and miniaturization re-quire higher integration levels and lower chip area for a given function, while battery capacity is one of the most critieal limitation for the user of handheld equipment requiring low power.

1.1

Wireless receiver

Fig. 1.1 shows the block diagram of a direct downconversion wireless re-ceiver

[21.

The signal received at the antenna is first passed through a band-pass filter (BPF) to select the desired band of signals and

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WIRELESS RECEIVER Antenna ~ Mixer LPF ADC 2 Received DSP data Mixer LPF ADC

Figure 1.1: Direct doumconversion wireless receiver.

ate potential interferers. A low-noise amplifier (LNA) then provides gain over a frequency range of the in-band (service band) signals. The filtered and amplified radio-frequency (RF) signal is then downconverted to base-band with the help of mixers and a local-oscillator (Lü). Further channel selectivity is obtained by using low-pass filters (LPF) which attenuate in-band adjacent channel interferers. Finally, the base band analog signal is converted into the digital domain by the analog-to-digital converter

(ADC) for further processing in the digital signal processing (DSP) unit of the receiver.

An important characteristic of the receiver is its noise factor F and noise figure NF

[31

which are defined in terms of signal-to-noise ratio

(SNR) at the input and output of the receiver as follows:

F = SN~ = Pi/Ni

S Ra Po/No

and F = 10 . loglQ(F),

(1.1) (1.2) where Pi and Ni are the signal and noise power at the input and Poand No are the signal and noise power at the output,respectively. The noise factor represents the degradation of input SNR by the noise added by the receiver. In order to achieve reliable communication,a minimum SNR is required at the output ofthe receiver (Po/Noin Eq. 1.1). Given that the minimum detectable signal power at the receiver input (Pi) is set by the wireless standard and the input noise power (Ni) is fixed under matched input conditions for a given bandwidth, Eq.1.1 gives the maximum noise factor the receiver can have if reliable detection is to be guaranteed. In

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WIRELESS RECEIVER

I

VOD 3

P

max Gel ••••••.••..••. ••.••..

-

r...-

.

...-

.

..-.. _..

r

SNDRmin UDR ... _

-OOR

,

'f

~

.

'\

Di

SIOrlrÎon

Pmin Gel. / SNRmin "f _.._ _ _.:- _ _ ~ Ni ...

~/

N

cl~

No

Input

I I I I Figure 1.2:

I

VSS Signal processor.

O

utput

terms of the noise factors of individual receiver components, the total noise factor of the receiver is given by the Friis formula

[31:

F2 - 1 F3- 1 F4 - 1 Ftotal

=

FI

+

~

+

ClC2

+

ClC

2C3

+ ...

,

(1.3)

where Fn and Cn are the noise factor and power gain of the nt h stage of the cascade, respectively. From Eq. 1.3, it is clear that the noise contributions from the receiver components are reduced by the gain of

theprevious stages in a receivercha in. Thus,a high gain and a low noise

factor are normally desired at the input stages of the receiver to lower

the noise contributions of later stages. This in turn helps in reducing the power consumption of lat t er stages and also the chip area in some

cases [4].

In Fig. 1.2, a receiver component (signal processor) is depicted as

a black box, which has a gain of Cel at its input and a noise floor of

power Nel. The dynamic range of the input signal is given by UDR2=

P max /P min,where P max and P min are the maximum and minimum input

signal power. Ni is the noise power present at the input. When the input

signal is close to Pmin, the output signal-to-noise and distortion ratio

(SNDR) is mainly limited by the output noise power No. It is assumed

that the intermodulation distortion due to worst-case interferers is much

smaller than the output noise. As the input signal power is increased,

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AUTOMATIC GAIN CONTROL 4

nonlinearities of the circuit components inside the processor, and signal distortion is observed at the output. Now, the output SNOR is limited by distortion. In all situations,the output SNOR should be higher than the minimum required SNOR set by the specifications. Thus, we observe that the gain Gel cannot be increased beyond a certain value without degrading the output SNOR. The range of input signals over which the output SNOR requirement is met is defined as the usable dynamic range (UOR) of the processor [4]. Thus, the processor is designed so that its UOR is large enough to accommodate the input signal dynamic range.

1

.2

Automatic gain control

The communication channel between the transmitter and the receiver is constantly changing. The transmitted signal arriving at the antenna of the receiver has time varying properties, e.g., input signal power, in-terferers' power,etc. Oesigning fixed circuits with a fixed gain Gel and noise power Nel to handle the entire input dynamic range is wasteful in terms of power and area [4]. A common solution is to use automatic gain control (AGC) [5] in which variable gain amplifiers (VGA) set the gains in a receiver chain to optimal values in order to provide relatively constant output amplitude. Thus, the circuits following the VGA re-quire less dynamic range. Fig. 1.2 is reproduced in Fig. 1.3 which now includes the AGC. With the help of AGC, a higher maximum gain Ge2

is achievable, which allows a higher noise figure (higher noise floor Ne2 in Fig. 1.3) of the processor. The higher noise floor does not degrade the overall noise figure of the receiver as it is clear from Eq. 1.3. When the input signal is high,the gain is changed to Gelto avoid excessive distor-tion due to signal clipping or saturadistor-tion. Thus, AGC helps in reducing the dynamic range requirements of the receiver (DORI

<

UOR2)'

Oue to the finite time constant of the receiver, any change in the gain settings causes output transients and distortion. Therefore, the gain settings can be changed only when no data is being received. In modern digital communication systems, information is sent as packets of data for a time duration during which the properties of the input signal can be considered slowly varying. In wireless systems like GSM [6] and WLAN [7]- [10], a part of the transmitted data packet, which is called as midamble or preamble, is used to measure the input signal power and the AGC gain settings are set to values to be used for the rest of the data reception. At the beginning of signal reception, the received

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AUTOMATIC GAIN CONTROL

VDD

5

P

max

Distortion

G

el

/':

::::~~~I-::::::

...

~

ISND

Rmin

...

G .: ..

I SNRm

in

c2 " r--· · ··· · ~ '\I'Ir '" P

min

::

/

·I~

~:m~7i:rNc2

'

N

o

" ~~...~~Nc l Ni .......'"'~

VS

S

I I I Input I Figure 1.3: I I I I Outp ut Signal processor with ACC.

signal power might saturate the receiver components or it might be so low that a correct measurement of the received signal power cannot be made. Therefore, a coarse gain adjustment is first made during the AGC operation. Once the coarse gain is set,the output transients are allowed to settle to obtain a correct measurement of the received signal power before finer gain adjustments are made

[111.

The time required by the AGC to settle to the final gain setting should be less than the time allotted for AGC convergence (gain acquisit ion) during the preamble or

midamble in a given wireless standard.

AGC has limitations which are described as follows. In the RF front-end of the receiver before the baseband filtering, the received signal contains interferers which limit the maximum gain control that can be achieved when using AGC. Therefore, only coarse AGC is used in the RF front-end and fine AGC is implemented after the filter and before the ADC

[111.

This demands higher dynamic range requirements from the filters, which costs more power [121. The AGC operation can be dis-tributed across the filter stages, further amplifying the signal while the interferers are attenuated by the filter. However, the AGC settling time would increase due to the finite time constant of the filter.

In wireless systems using OFD M modulation, the received signal has

a high peak-to-average power ratio (PAPR) of 2 . In(Ns c) , where Nsc is the number of sub carriers [151. Since the AGC operation is based on measurement of the average signal power, headroom of at least 12 dB

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DYNAMIC GAIN AND IMPEDANCE SCALING 6

needs to be added to the receiver dynamic range for 100 subcarriers. The above shortcomings of AGC get worse as the supply voltage of analog circuits is reduced with an aim to integrate both analog and digital circuits on a single chip using a single supply voltage. Although these limitations of AGC are valid for the entire wireless receiver, this thesis focuses on the baseband section consisting of channel-select low-pass filter (LPF) and ADC (Fig. 1.1).

1

.3

Dynamie gain and impedanee sealing

In low-pass filters and ADCs, the thermal noise power is inversely pro-portional to the capacitance used in the circuit [12]. For example, a first-order RC filter has a mean square noise voltage ofkT/C, where k is Boltzmann'sconstant,k

=

1.38X10-23J/K, T is the absolute

temperat-ure in Kelvin and C is the capacitance. Thus, lower noise requires larger capacitance at a given temperature and hence larger chip area. The resulting smaller impedance levels associated with a larger capacitance in a circuit also require larger currents in order to be driven at a given signal swing, which results in higher power dissipation. Thus, every 3 dB headroom in the dynamic range requires double the capacitance used in the circuit and may lead to a doubling of the power consumption [12]. In order to circumvent the limitations of AGC listed in the previous section, a dynamic gain sealing technique has been proposed [13]. The dynamic gain sealing approach applied to the design of a continuous-time filter is illustrated in Fig. 1.4(a) [13]. In this technique, a single high dynamic range filter is replaced by several parallel low dynamic range filters each with a different input gain. The output gain of each path is the inverse of the input gain in order to maintain identical filter transfer functions. Us-ing different gain settUs-ings at the input, each filter path covers a different portion of the desired dynamic range UDRtotal as shown in Fig. 1.4(b). The input is applied to all the filtering paths and all the filters operate continuously and at all times. By switching on the appropriate output, the signal is taken from the filter path which has a UDR in which the input signal power falls (see Fig. 1.4(b)). If the input level changes, then a different filter takes over by selecting the corresponding output switch. Theoretically,this does not introduce undesired transients at the output, since the gains of the individual filtering paths are fixed and therefore, no settling of the filters is required.

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con-DYNAMIC GAIN AND IMPEDANCE SCALING PI P2 P3 ,...., CO "0 ' - ' ..:: Cl

z

ti)

..

UDRtotal Input level (dB) (b) 7

Figure 1.4: (a) Dynamic gain sealing using low dynamic range filters in

par-allel, (b) Partitioning of usable dynamic range among several filter paths.

sumes much less power than using a single filter covering the entire dy-namic range [13]. This can be illustrated by an example as follows. Let the dynamic range and power consumption of a low-pass filter be UDRn in dB and Pn in watts, respectively. Since the higher end of the dynamic range of a filter is ultimately limited by the supply voltage in a given IC technology, its dynamic range can be increased by decreasing its noise power. So, if we want to increase the dynamic range of the filter by 12 dB, it would cost 16 .Pn power. On the other hand, by using

dy-namic gain sealing as shown in Fig. 1.4, we can choose gl as 0 dB,

tn

as 6 dB and g3as 12 dB to increase the dynamic range of the overall

filter by 12 dB. Excluding the power consumed by the input and output gain elements for simplicity, the total power consumption in this case is 3· Pn . Thus, using dynamic gain sealing, the power consumption can be

reduced by 5.3 times for a 12 dB inerease in dynamic range as compared to a conventional filter. If the chip area is limited by the capacitance

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DYNAMIC GAIN AND IMPEDANCE SCALING 8

area, the chip area also reduces by 5.3 times.

When designing channel-select filters using dynamic gain sealing, the presence of interferers should be taken into account. Interferers may limit the gain at the input of each filter path. In a multi-staged filter, the interferers are progressively attenuated by successive stages. Thus, the gain sealing shown in Fig. 1.4(a) can be distributed across the vari-ous stages of the filter and lower power consumption can be obtained. The input stages,however, must handle the entire dynamic range of the input signal containing large interferers, which results in higher power dissipation in the input stages. This is wasteful when the desired signal is well above the noise floor.

In order to further optimize power consumption, dynamic impedance sealing with dynamic biasing has been proposed [141. Fig. 1.5 shows an example for a first-order active-RC filter [141. Parallel conneetion of the upper and lower order replica filters in Fig. 1.5 results in a first-order filter with the same frequency response but 3 dB lower noise floor assuming that the noise from the two filters is uncorrelated. Thus,when the signal power is low, the noise floor can be reduced by connecting the filters in parallel to satisfy the minimum SNR requirements. However, when the signal power increases, the noise floor is allowed to increase

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DYNAMIC GAIN AND IMPEDANCE SCALING 9

by disabling the parallel conneetion and the unused circuitry is powered down to reduce power consumption. When the system is needed to process signals with low noise floor again, the lower filter is first turned on to charge up the capacitor as required by the signal before it is connected in parallel to the upper filter to avoid output transients [14].

Dynamic gain and impedance sealing can be combined to achieve a power optimized filter with low power consumption [14]. However, both techniques use the measure of average input signal power and not in-stantaneous power. In dynamic gain sealing, it is possible to use instant-aneous power to control the selection of different filter paths. However, in higher order filters, each filter stage adds a phase delay to the input signal. Therefore, the instantaneous value of the signal at various stages can peak at different times. This requires a separate controller, a set of input and output gain sealing elements and switches for each stage. This can greatly complicate the design, and excessive switching in the filter may lead to distortion at the output. In dynamic impedance sealing, the circuits in parallel first need to be powered up before they can be connec-ted to the output and thus, the operation can only be based on average signal strength. Therefore, the problem of PAPR is not addressed in both cases, and extra headroom needs to be given in each parallel path which is wasteful. Also, mismatch between the parallel paths used in either technique may give rise to distortion at the output.

The problem of PAPR can be tackled if we can devise a solution where filter gain settings can be changed dynamically based on the instantan-eous input signal power while maintaining minimum required SNDR, and without requiring parallel filter paths. This is possible with in-stantaneous companding [4]. Companding (compressing andexpanding)

compresses a high dynamic range input signal, processes it in a smal-ler dynamic range circuit or system and then expands it at the output. In principle, companding can be used in any communication system to reduce its dynamic range requirements [4]. This technique has been used in various applications such as telephony, radio transmission, tape recording, hearing aids, and ot her applications that have to process sig-nals having large dynamic range through transmission channels with a dynamic range smaller than that required by the signal [4]. There are mainly two types of companding: instantaneous companding where the gain of the system is changed dynamically based on the instantaneous value of the signal, and syllabic companding where the gain of the sys-tem is changed according to a slowly varying characteristic of the signal

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THESIS OUTLINE 10

such as its root-mean-square (RMS) power or envelope [4].

This thesis focuses on the application of companding to wireless com-munication systems, in particular,the baseband part of the wireless re-ceiver. In this thesis,companding using switched-capacitor (SC) circuits is proposed to achieve both instantaneous [16] [17] and syllabic [18] type dynamic gain sealing in the baseband filter to extend the UDR of base-band circuits by 12 dB. As a proof-of-concept, it is shown with the help of measured results that instantaneous companding by a factor of 4 in-creases the UDR of a SC low-pass filter by around 12 dB over a minimum SNDR of 34 dB and an EVMrmsof less than 3.8% [19] [20]. Using

simu-lation results,it is shown that instantaneous companding by factor of 4 reduces the power consumption of the filter by 4.3 times whereas syllabic companding by factor of 4 reduces the power consumption of the filter by a factor between S.8 and 9 times as compared to a non-companding SC filter designed for the same UDR. In both types of companding,the effect of mismatch is taken into account. Since the SC filter provides a discrete-time output and is followed by an ADC in the receiver, a com-bined companding base band system is proposed in which the expansion of the signal is done in the digital domain. With the help of simulation results, it is shown the companding by factor of 4 reduces the dynamic range requirements of the ADC by 12 dB without causing any penalty in the design and performance of the ADC [21]. All the circuits presented in this thesis are designed in IBM's 1.2 V,0.13 tui: CMOS technology.

1.4

Thesis outline

This thesis is organized as follows. Chapter 2 introduces the concept of companding in the form of state-space description and explains how it can benefit baseband circuits in terms of power consumption and chip area. Later, we discuss the challenges involved in practical implement-ation of companding systems and how these challenges can be met by using companding in discrete-time domain using SC circuits. Finally,

design methodologies are presented to implement practical companding baseband circuits. Chapter 3 discusses potential wireless applications where companding can be useful. The IEEE 802.11a WLAN standard has been chosen for implementation of the companding baseband circuits in a proof-of-concept. To this end, link budget and base band specifica-tions are derived for an 802.11a WLAN receiver in Chapter 3. Chapter 4 presents the implementation details of a Sth-order, Chebyschev, ladder

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THESIS OUTLINE 11

type, instantaneously companding by factor 4, low-pass SC filter for the 8ü2.11a WLAN receiver baseband. Measured results are presented and discussed in comparison with other state-of-the-art filters. In Chapter 5, the design of a 5t h-order Chebyschev ladder low-pass SC filter with syllabic companding by factor 4 for 8ü2.11a WLAN application is presen-ted as an alternative to using ACC or dynamic gain sealing techniques. In Chapter 6, the ADC is included with the companding filter to com-plete the companding baseband system designed for the 8ü2.11a WLAN receiver and simulation results are presented. Finally, Chapter 7 con-cludes the thesis, summarizes the contributions and presents the outlook for future work.

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c:

2

_

C

ompanding

2.1

Introduction

Companding is a portmanteau of compressing and expanding. It consists of compressing a high dynamic range input signal, processing it in a lower dynamic range circuit or system and then expanding it at the output to reeover the desired signal. The result of such an operation in a signal processor is shown in Fig. 2.1(a). The input signal is compressed into a smaller dynamic range allowing a higher noise floor in the processor,

which lowers power consumption and chip area as discussed in Chapterl.

Since the processor's noise adds to the compressed signal, it results in an almost flat S OR at the output (after expansion) for a wide range of input signal powers as shown in Fig. 2.1(b ). Fig. 2.1(b ) also compares the output S OR of the companding case with the non-oompanding case showing an increase in the usabie dynamic range ( OR) of the processor due to companding. Ideally,as the input signal power increases above the minimum detectable signal (sensit ivity Pm in in Fig. 2.1(a )),

companding takes place and keeps the S Rat the output flat. However,

in practical ystems companding always results in some distortion at the output because of mismatch and circuit non-idealities. Therefore,

ome margin needs to be given above the sensitivity of the receiver after which companding can take place.

Companding is an inherently nonlinear operation but as long as the input-output relationship of the sy tem exhibit linearity and time in-varianee it is of less importance that the system is internally nonlinear and/ortime varying

[41

.

Several examples of externally linear,internally

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1 INTRODUCTION 14 Output UDR2 pmax"""":Il~---.

I

.... VDD //... _ ..

1

SNDRmin ~ " ,il - '"

!

I

~

~~~~~~~0?~~I~~~~~~~~~~~~~~~

Noise

+

Distortion

.- G : " ~ c2 ,: '\ o ._' .._ ~ '.'t,

t>

Pmin --:iZ-_~' " ~ • •

.5

...

Nc2 \ ...

·----1

SNDRmin : ~ Ni~ , I Noise

:

I

VSS Input I (a) w/ocompanding ~ companding

i

7f7{:~

--"'

i

s~

~~

I •

I.

UDR2 .. : I • I • I • I • I • I • •

P

max I

Pmin Inputlevel (dB)

(b)

Figure 2.1: (a) Companding signal processor , (b) Comparison of output SNDR for com panding and non-companding systems.

nonlinear (ELIN) systems exist [4]. For instance,in current mirrors [22]

the input current is first converted to a voltage by the nonlinear oper-ation of a diode-connected transistor. The resulting voltage is conver-ted back to an output current by the inverse nonlinear operation of the same device type, resulting in linear input-output behavior. In general,

most systerns are designed so that the non-linearity of its components is suppressed or reduced, e.g., using üTAs in negative feedback loops to achieve precise linear amplification [23]. However, it can be useful to design practical ELIN systems in which the non-linearity is intentionally introduced to solvea particular problem [4]. In this chapter, a brief

(35)

dis-EXTERNALLY LINEAR, INTERNALLY NONLINEAR SYSTEMS 15

cussion on the theory of ELIN systems and their application to designing companding systems are presented. Two types of companding, instant-aneous and syllabic,are considered. The implementation methodology of the companding baseband filter using switched-capacitor (SC) circuits is

proposed. The companding baseband filter is followed by an ADC,which yields further benefits in performance by doing the expansion in the di-gital domain. To this end, a combined companding filter and ADC is proposed.

2.2

Externally Iinear, internally nonlinear systems

Companding systems generally include a compressing input gain element, a signal processor and an expanding output gain element. In order for the output of the signal processor to not be disturbed by dynamic modi-fications of the gain at the input end,one must control the system's state variables accordingly [4] [251. In general, this concept can be analyzed with the help of control systems theory as discussed below [4].

Consider a linear, time-invariant (LTI) system, characterized, in the time domain, by the following state-space description:

In Eqs.2.1-2.3, u is the input vector,y is the output vector,x is the state variable vector, and A,B,C,D are matrices of appropriate dimensions; the dot denotes the derivative with respect to time. Consider now a new time varying system of the same dimensions, and driven by the same input u as the system in Eqs.2.1-2.2. Let

y

be the output of the system and w be the vector of its state variables. This system can be described by the following state-space description [4]:

x(t )

=

Ax(t)

+

Bu(t), y(t )= Cx(t )

+

Du(t),

with the initial condition:

x(to)

=

Xo. w(t)

=

Á(t )w (t )

+

B(t )u (t ), y(t )= ê (t )w (t )

+

D(t )u (t ), (2.1) (2.2) (2.3) (2.4) (2.5) where Á(t ),B(t ), ê (t )and D(t )are matrices of the same dimension as A,B, C andD,respectively. The state variable vector w is modified in

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EXTERNALLY LINEAR,INTERNALLY NüNLINEAR SYSTEMS 16

relation with x and this modification is assumed to be in the form of a multiplicative factor given by

[4]

w(t) = G(t )x (t), (2.6)

where G(t) is an appropriate square matrix, not necessarily diagonal, which is assumed to have an inverse and a derivative for all t. The initial condition for the state variable vector w is given by

w(to)= G(to)x o. (2.7)

The two systems would have identical outputs, i.e.,y(t) = y(t) for all t when

[4]

Á(t) = G(t )G-I (t )

+

G(t)AG-I (t ), B(t)= G(t)B , ê(t )

=

CG-I(t), D(t )

=

D. (2.8) (2.9) (2.10) (2.11) Thus, if the time varying system is implemented according to Eqs. 2.8-2.11, we obtain an externally linear, time-invariant and internally time varying system. Since G(t ) is any arbitrary time varying function, it can also be a function of the input u(t ). Thus, the system defined by Eqs.2.8-2.11is, in general,an externally linear and internally nonlinear (ELIN) system [4]. Any LTI transfer function can be represented by such a state-space representation and thus, it can be transformed into an ELIN system.

Applying Eqs. 2.4-2.11 to the LTI lossy integrator shown in Fig. 2.2(a) (lossless for a

=

0, where a~ 0 is a fixed feedback gain factor) results in the companding integrator shown in Fig. 2.2(b) [4] where

w(t)

=

g(t) .x(t ). (2.12)

In Eq. 2.12, the time varying gain function g(t)can be used to achieve compression at the integrator's output. Ifg(t) is derived based on the instantaneous value ofx (orw)then it results in an instantaneously com-panding integrator,whereas ifg(t )is derived from an average measure of the signal strength (e.g.,the root mean square (RMS) value or the envel-ope of x (orw)) then it results in a syllabic companding integrator [4].

The dynamic range of an integrator is given by the ratio of the max-imum and minmax-imum signal level it can handle without degrading the

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EXTERNALLY LINEAR, INTERNALLY NONLINEAR SYSTEMS 17 u

J

(a) x y u

J

w y (b)

Figure 2.2: (a) A linear, time-invariant lossy integrator, (b) Companding lossy integrator.

output signal-to-noise and distortion ratio (SNDR) below the minimum required SNDR. The lower end of the dynamic range of the integrator is limited by its noise power which is inversely proportional to the in-tegration eapacitanee [241. So, a smaller dynamic range requires less eapacitanee and thus, it requires less eurrent to drive the eapaeitanee. Both types of eompanding, instantaneous and syllabie, limit the signal w at the integrator's output within a smaller dynamic range while allowing a higher dynamie range input signal. Thus, eompanding helps to reduee the power eonsumption of the integrators. Sinee the integrators are the main building bloeks and work horses of analog filters, eompanding ean be used to reduee the power eonsumption of the filter.

2.2.1 Noise analysis

Although an ELIN system is linear from input to output, it is not neees-sarily linear from noise generated internally to the output. In general,

(38)

EXTERNALLYLINEAR,INTERNALLYNONLINEARSYSTEMS 18

f

__________________________________________._. . a_a'

···

···

···

·

: Yn

···

·

·

---

---_._._._.

---._._-_.-

---u

Figure 2.3: Com panding lossy integrator with intern ol noise sourcesnl and

n2·

(2.16) (2.15) the evaluation of theoutput noise due to internal noiseexcitationscan be very complicate d [261 because of the nonlinear operation of a cornpand-ing syste m internally. The noise analysis can besimplified by assuming that the dominant noise sourees can be combined together as equivalent noise sourees nl(t) and n2(t )at the input and output of the integrator, resp ectively, as shown in Fig. 2.3. The second assumption is that both

nl(t) and n2(t) are much smaller than the signal [261 so that thevalue of the companding gain function g(t ) is determined mainly by the signal, For the noisycompandingsyste m in Fig. 2.3 and noting that 9

=

f(wn ) , we can write the state-space equations as follows:

Wnl(t)

=

aWnl(t)

+

~

~::~

Wnl(t)

+

f(wn)u(t)

+

nl(t), (2.13)

wn(t) Yn(t)= f(w

n) , (2.14)

wherewn(t) = Wnl( t)

+

n2(t ). For the noiseless companding system in Fig.2.2(b) ,the state-space equations are

. j (w)

w(t)

=

aw(t)

+

f(w )w(t)

+

f(w )u (t ), w(t)

y(t )= f(w ).

We definethe output noise for the noisy companding system in Fig. 2.3 (relat ive to the noiselesssystem in Fig. 2.2(b) ) as

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EXTERNALLY LINEAR,INTERNALLYNONLINE AR SYSTEMS ~

..

_

----_._._---_

...

_-_._

..

.

-.

--19 g=f(w)

J

z llZ/g Figure 2.4: Companding lossy integrator with only noise as inputs.

Under the assumption that nl( t) and n2(t )are sufficientlysmall,we can write

Using Eq. 2.14, Eq. 2.16, Eq. 2.17 and Eq. 2.18,we get ( )_ wn(t) w(t) no t - f(w n) - f(w ) Wnl(t) - w(t)

+

n2(t)

=

f(w ) z(t )

+

n2(t)

=

f(w ) (2.18) (2.19) where z(t) = Wnl( t) - w(t) is defined as a new state variabie for the output noise no(t). By subtracting Eq. 2.13 and Eq. 2.15, and using Eq. 2.19, we can write the st at e-space equations for the output noise as follows:

(2.20) (2.21)

Eq. 2.20 and Eq. 2.21 can be implement ed by the syste m shown in Fig.2.4. We can observe that the subsystem shown in the dashed rect-angle in Fig. 2.4 is the same ELIN system as in Fig. 2.2(b). Thus, we can combine the two systems, which results in an equivalent noisy

com-panding syste m shown in Fig. 2.5 under the assumptions made during

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EXTERNALLY LINEAR, INTERNALLY NüNLINEAR SYSTEMS 20

r···.··.··--·.---·--···.·--··---·---.·. _. w

f

Figur e 2.5: Equivalent companding lossy integrator with noise.

by 1/g(t), add to the input and output signal, respectively. Since g(t) is

inversely proportional to the input signal strength to achieve

compres-sion, the noise added at the input and output increases when the input

signal is large because g(t) is small. When the input signal is small, the

opposite happens. This results in an almost constant SNR for a wide range of input signal powers, which is a typical characteristic of

com-panding systems. Also, since 9 = f(w) is any arbitrary function, the

result is valid for both instantaneous and syllabic companding under the assumptions stated previously.

2.2.2 Design challenges

An example of a mapping between instantaneous values of state variables

x and w is shown in Fig. 2.6, where g(t) is the slope of the curve. The

mapping issuch that g(t) is high for small values of x and low for large

values ofx. There are several practicallimitations of choosing any

arbit-rary gain function [4]like the one shown in Fig. 2.6. For example, for any

compressive function g, its inverse function 1/9 and its time derivative

IJ

should be synthesized precisely so that the non-linearities introduced

within the system are perfectly coordinated according to the governing

equations. This is possible only in theory. Mismatch, high-frequency

effects and other circuit non-idealities can cause distortion at the

sys-tem output. Moreover, the implementation of the input gain g, output

inverse gain 1/9 and derivative function

IJ

in each integrator can make

the circuit very complex and may result in extra power consumption and chip area.

(41)

EXTERNALLY LINEAR, INTERNALLY NüNLINEAR SYSTEMS 1.0 0.5 ~ ~ 0 ;> ~ -0.5 -l'--"'=--~---~--~---' ~ -2 0 2 4 xlv vrnax

Figure 2.6: Example of mapping between state variables x and w.

21

Another problem arises when a small, desired signal co-exists at the integrator's output w with a larger, undesired interferer

[41

.

The larger signal can drive 9 (g= dw / dx in Fig.2.6) into regions of low slope, and thus make the noise added to the signal at the input and the output in Fig. 2.5 much larger, degrading the SNR. This effect may occur in the first stages of the filter where large interferers can be present, and may necessitate some form of prefiltering by a linear filter in order to reduce the amplitude of large interferers to a sufficient extent. However, the actual implementation differs from case to case and it also depends on the type of companding used. For instance, consider a filter in which the maximum power of the desired signal is much higher than the power of worst-case interferers. Ifthe desired signal has high PAPR, instantaneous companding is useful and is mainly used in the higher end of the dynamic range of the input signals. In such a case, companding is switched on only when the bit-error rate (BER) or packet-error rate (PER) starts to degrade beyond the minimum required value due to clipping of the desired signal. When the desired signal power is low, companding is switched off and the interferers have no effect on the operation of com-panding. Similarly, if syllabic companding is used in such a filter then the power or envelope of the output signalof the filter can be used as a measure to implement syllabic companding. However, a linear prefilter might be needed when the interferers cause high in-band second-order intermodulation distortion due to companding and degrade the output SNDR of the desired signal.

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COMPANDING IN DISCRETE-TIME DOMAlN 22 I

;

7

Iv hivt maxI 0.5 ><

101

<, Ol Iv h/v I E > 0 t max -... ~ 4 2

7

ta te

=121

,

I

-0.5 I1I -l ...----~---~-- -'---' -4 -2

o

x

lv

max

Figure 2.7: Piecewise-constant mapping from x tow.

2.3

Companding in discrete-time domain

Designing opamp based companding baseband filters in the discrete-time domain has several advantages over continuous-time implementations.

As discussed before, companding systems involve modifying the gain settings and updating thestate variables. Anycha ngein thegainsettings and state variables implies a transient that requires some settling time. For instance, in continuous-time filters, the state variables are stored as voltages across the integration capacitors. Any updating of the voltage across the capacitors would require time for the voltage to set tle to the steady-state value because of the finite time constant of the charging or discharging paths. In a discrete-time implementation, only the final value of the sampled signal at the end of the sampling period is important. Therefore, as long as the output settles to within the required accuracy at the end of the sampling period, transients do not cause distortion at the output.

2.3.1 Instantaneous companding

A simpler way to implement an arbitrary gain function 9 is to use a piecewise-constant mapping between state variables x and w [41,an

ex-ample of which is shown in Fig. 2.7 [271. In this case, the

iJ/

9 term in

I

the feedback block of the integrator shown in Fig.2.2(b) is equivalent to

I

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COMPANDING IN DISCRETE-TIME DOMAIN

<1>2: Integration Phase <I>1:HoldPhase

11 23 Figure 2.8: (2.22)

l

1

<I>1 Cs1 <1>2 Input....,/

~~--+----t~>--...,

<I>~

<1>2

<1>2

)1 .

I

<1>1

)1

V

tf\~

) ~~

~xt

<1>2

1

<I>1

1

Opamp Swit ched-capacitor integrator.

state variabie updating, given by the relation [4]:

w(tt )=

w(

t"k) ~,

9k- 1

wherek is used as an index to represent different values of 9 that appear in time,tkis the time instant at which the valueof9 changes from 9k - 1

to 9kand w(t"k) and w(tt) denote the limit ofw(t) as timet approaches

time instant tk from left and from right on the time axis, respectively. In Fig.2.7,the consecutivevalues of 9 (1, 1/2, 1/4) differ by a factor of 2 [27], and Vm a x is the maximum allowable voltage that could saturate the output of the OTAs. We define states 0,1 and 2 by the variabie State

corresponding to the values 1, 1/2 and 1/4 of 9, respectively. In such a case, the updating of state variabie w in Eq. 2.22 amounts to either doubling it or halving it whenever there is a change in 9 [27]. Compar-ators can be used to detect the crossings of w through the thresholds

(Vihland Vih2 in Fig. 2.7,where Vihl

<

Vih2/2 to avoid instability) and

change 9 accordingly.

A companding filter using a piecewise-constant function 9 can be implemented using SC integrators [27] [28]. Fig. 2.8 shows the parasitic insensitive SC integrator [29] in which Cs i and Cs2 denote the values of

the input and output sampling capacitors,respectively, and Cl denotes the value of the integration capacitor. The two non-overlapping clock phases are <1>1 (sampling/hold phase) and <1>2 (integrat ion phase ). The input signal is sampled in ph ase <1>1 during which the output of the OTA is held constant . During phase <1>2,the charge from the sampling capacitorCsi is transferred to the integrating capacit or Cl.

The SC integrator in Fig. 2.8 is modified to impIement gain scal-ing and state variabie update (also called memory update) resulting in the companding SC integrator shown in Fig. 2.9(a) [27]. The sampling

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COMPANDING IN DISCRETE-TIME DOMAlN

<1>2: Integration (Comparison) Phase <1> 1: Hold Phase (a)

s,

Sa Inc, Dec <1>2 <1>1 10 Time (ns) (b) Inc Dec 24

Figure 2.9: (a) Companding switched-capacitor integrator, (b) Timing

dia-gram for digital signals.

capacitors at the input (of value Csd and output (of value Cs2)are re-placed by arrays of capacitors to implement gain sealing by factors of 2. Similarly, the integration capacitor of value Cl is replaced by a set of capacitors to do memory update. Sil, Si2,Sol, S02, Incand Decare digital signals. Based on the OTA's output at the end of <1>2 (compar-ison phase), Sil and Si2change the input sampling capacitance CsI to

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COMPANDING IN DISCRETE-TIME DOMAlN 25

Sol and S02 change the output sampling capacitance Cs2 to provide an inverse gain for the subsequent stage (expansion). The charge (memory) on the integration capacitance Cl is then updated. When the gain is decreased by 2 (when Dec becomes high), one half of Cl is disconnected and discharged to ground during <1>1 without affecting the output. When it is reconnected to the other half of Cl during <1>2, it halves the output voltage. Another capacitor C l n e of same value as Cl is charged to the output voltage during <I>1. When the gain is increased by 2 (when Inc becomes high), Clne is discharged via the input of the üTA during <1>2 and thus, it doubles the output voltage. These compression, expansion and memory update operations are synchronized due to the discrete-time operation. To reduce complexity, the expansion at the output of each stage is combined with the compression at the input of the following stage resulting in an equivalent gain for the following stage. For each stage, the companding algorithm works on a finite-state machine (FSM) run by a controller consisting of comparators and digital circuits. The digital signals are sent out during the hold phase <1>1 to execute com-panding in the next <1>2 when gain sealing and memory update takes place. The control circuits need not be designed fast because there is sufficient time (clock phase <I>1) for these control signals to propagate on the chip. The control signalDec, however, is used during phase <I>1, but since one half of the integration capacitor is discharged to a common-mode voltage during the memory update when Dec becomes high, speed is not important and the capacitor can be discharged accurately during a part of phase <1>1 (excluding the propagation delay of the signal Dec). Fig. 2.9(b) shows the timing diagram of the control signals with respect to the clock phases <1>1 and <1>2.

In Fig. 2.7, the threshold \/th2 is chosen such that it is lower than Vm ax that could saturate the output of the üTAs. The choice of these thresholds must be made carefully. When a signal with high amplitude and at a frequency close to the filter cut-off frequency is applied to the input of an SC filter, the jumps between the output voltages of the üTAs in consecutive cycles of <1>2 can be very high, especially in State 0 when there is no compression. For example, the output voltage of the üTA can be less than but close to \/th2 in one cycle of <1>2. In the next cycle of <1>2, it can jump to a much larger voltage before a decision to compress the signal is made. Therefore, threshold \/th2 should be made lower than Vm ax to accommodate such a signal step. Although the signal is allowed to go beyond threshold \/th2 in the final State 2 (as shown

(46)

COMPANDING IN DISCRETFrTIME DOMAlN 26

in Fig. 2.7), part of the dynamic range may be compromised because input signal sensitivity puts a lower limit to the minimum value of yth2 that can be used. Since the filter noise is determined by the minimum required sensitivity, it should be ensured that yth2 is high enough such that compression does not bring down the desired signal to below signal sensitivity levels. The lower limit of yth2 is further set by comparator resolution and ot her process non-idealities like the OTA's DC offset. As explained in a later section, DC offset gives rise to distortion at the output. For a given value of DC offset, a lower yth2 will result in lower signal-to-distortion ratio, since the worst-case DC offset is the same but the signal power is low. Thus,the minimum value of yth2 may put a limit on the maximum amplitude of the signal that the companding filter can accommodate without saturating any of the OTAs. The generaI design rule is to choose the threshold voltages as high as possible.

An alternate solution could be to increase the oversampling ratio of the SC filter so that the signal is sampled faster, and thus the voltage jumps would be smaller. In such a case, yth2 can be set to a higher value. Also, having a higher oversampling ratio eases the anti-aliasing requirements of the prefilter [301. However,a faster clock decreases the sampling period,which requires faster OTAs to achieve a given settling accuracy. Faster amplifiers may consume more power to maintain the same phase margin for a given in-band noise power. A higher clock frequency can also make the value of the sampling capacitors (Csi and

Cs2) in Fig. 2.8 very small making it unrealistic to realize the array of capacitors in Fig. 2.9(a) on-chip. Besides, the design of switches be-comes challenging to achieve low distortion at high sampling frequency. Also, higher thresholds increase the jumps in the output voltage (w in Fig. 2.7),which may de mand higher slew rate ofthe OTA's output stage. So, there are several parameters: oversampling ratio, threshold voltages, sensitivity, OTA's DC offset and slew rate that should be considered in the design of the companding filter. Thus, system level simulations are required to choose these parameters in order to optimize the system for best performance.

2.3.2 Syllabic companding

For instantaneous companding,as discussed in the previous section, com-pression and expansion were controlled by the instantaneous value of the signals at the output of the integrators. In higher order filters, each filter stage pro duces a phase delay in the input signal. So, the instantaneous

(47)

COMPANDING IN DISCRETE-TIME DOMAIN 27 y Expansion

~~>---

... Baseband Filter Compression

.z.,

>>---.t

/ , /

Memoryl update

value of the signal at various stages can peak at different times, which imp lies that compression, memory update and expansion need to be per-formed in each stage of the filter almost independently of ot her stages. This requires a separate companding controller for each stage and results in high complexity.

In syllabic companding, a measure of the average strength of the signal (e.g., RMS value or signal envelope) is used as a control variabie to execute companding. Usually, the signal from the last stages of the filter is used to measure the average strength since the interferers' power is low compared to the desired signa!. Based on this measure, the same gain setting is used for all stages of the filter. This makes the inter-stage gain unity, and thus gain sealing is needed only at the input and output of the filter. Only one companding controller is required, which reduces the complexity of the syllabic companding filter. Fig. 2.10 shows the block diagram of the syllabic companding filter in which gain sealing is done only at the input and output, and state variables are updated within the filter. The average measure of the signal is taken from the expanded output y in Fig. 2.10. Here, we also use a piecewise-constant gain functiong(t) as a function of average output RMS value as shown in Fig. 2.11. Since the gain changes by a factor of 2, the same state variabie update and gain sealing circuitry (described in the previous section) is used to implement the syllabic companding filter.

2.3.3 OTA'sDC offset cancellation

The input-referred DC offset Vos of the OTA based integrator sees the same transfer function to the output as noise nl(t) in Fig. 2.3 assum-ing that Vos does not affect the companding gain function 9 such that Eq. 2.18 is valid. So, in the equivalent representation in Fig. 2.5, a sig-nal dependent modulated version of the DC offset Vos/g(t) adds to the

(48)

COMPANDING FILTER AND ADC

o

State=2 28 H---+··· .

T···

1I4l ·.·.l

\

Pmin

PI

Pz OutputpowerP;(W)

Figure 2.11 : Normalized gain function fOT syllabic companding.

input signal causing distortion. In an instantaneous companding filter, companding takes place on both positive and negative half cycles of the input signal independent of the sign of the signal. Since the DC offset has the same sign in both positive and negative half cycles of the input signal and the gain g(t)is always positive, it adds the same error voltage to the input signal in both cycles, giving rise to even-order distortion. This effect is illustrated in Fig. 2.12 for a sinusoidal input in which the input sine wave, the compressed waveform and the error voltage due to DC offset modulation are shown. The error signal has a frequency twice the input frequency and a pulse width equal to the time interval during which the companding takes place.

In syllabic companding filters, the gain settings of the filter change based on the average signal power and so each gain setting can last for several cycles of the input signal. Each time the gain switching occurs, the DC offset appears as a DC voltage step and the filter reaches steady state after a certain transient time that depends on the time constant of the filter. During this transient, distortion appears at the output. In modern CM OS technologies, the DC offset Voscan be as large as 10 mV which can be much larger than the input signal in certain cases. Thus, the DC offset may lead to a sudden degradation in output SNDR and must be reduced to very small values.

(49)

COMPANDING FILTERAND ADC 29 ~

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Figure 2.12: Waveforms to illustrate theeffect of the OTA's DG offset in an instantaneously companding switched-capacitor filter.

2.4

Companding filter and ADC

In both instantaneous and syllabic companding filt ers, an extra analog expansion amplifier is needed at the output to reeover the correct signal, which results in extra power consumption. Since the filter is followed by the ADC, the power consumption can be reduced by removing this expansion amplifier and directlyfeeding the compressed, lower dynamic range output signa lofthe filt er to the ADC.The signa lexpansion (mul-tiplicationby2or 4) can bedone inthedigitaldomain. Thisalsoreduces the dyn ami crangerequired from theADC ,lowerin gits power consump-tion . Other ADC specificat ions are not affected since the filter output is in discrete-time doma in and digital information about the expansion is available from the FSM. Also, since the signal is already sampled, a sample and hold amplifier (SHA) will not be needed in front of the ADC. However, SC filters need an anti-aliasing filter in front of them. Fig. 2.13(a) shows the last (nth) stage of theinst ant aneous companding

filter with the expansion stage moved to the digital domain. Similarly, Fig. 2.13(b) shows the syllabic compand ing filter and the ADC wit h expansionin the digital domain.

(50)

SUMMARY 30

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Figure2.13: (a) !ns tan taneous compandingfilter and ADC, (b) Syllabicco

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2.5

Summary

In this cha pte r, the concept of companding as an exte rn ally linear, in-tern ally nonlinear system was discussed. Asimplified noise analysis was

carried out for companding systems and the challenges in the imp le-mentation of companding filters were explained. In this respect,design methodologies for implementing instantan eous and syllabic type base-band companding filter using piecewise-constant gain functions and SC circuits were presented. The concept was further exte nded to include the ADC resulting in a combined companding filter and ADC base band

Cytaty

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