<Semi-(,onau.ctot ^P , One.
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081 U.S.A.
PAD SERIES
TELEPHONE: (973) 376-2922 (212)227-6005 FAX: (973) 376-8960
PICO AMPERE DIODES
FEATURES
DIRECT REPLACEMENT FOR SILICONIX PAD SERIES REVERSE BREAKDOWN VOLTAGE
REVERSE CAPACITANCE
BVR > -30V Crss ^ 2.0pF ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature
Operating Junction Temperature
-55to+150°C -55tO+150°C Maximum Power Dissipation
Continuous Power Dissipation (PAD) Continuous Power Dissipation (J/SSTPAD)
SOOmW 350mW Maximum Currents
Forward Current (PAD) Forward Current (J/SSTPAD)
50mA 10mA
PAD1,2,5
JPAD
PAD50
A & Case
SSTPAD
c m
JCOMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL
BVR
VF
t-TSS
CHARACTERISTIC Reverse Breakdown Voltage
ALL PAD ALL SSTPAD
ALL JPAD Forward Voltage
Total Reverse Capacitance PAD1.5 All Others
MIN -45 -30 -35
TYP
0.8 0.5 1.5
MAX
1.5 0.8 2
UNITS
V
pF
CONDITIONS
IR = -1UA
IF = 5mA
VR = -5V, f= 1MHz
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL
IR
CHARACTERISTIC
Maximum Reverse Leakage Current
PAD1 PAD2 (SST/J)PAD5 (SST/J)PAD10 (SST/J)PAD20 (SST/J)PAD50 (SST/J)PAD100 (SST/J)PAD200 (SST/J)PAD500
PAD -1 -2 -5 -10 -20 -50 -100
JPAD
-5 -10 -20 -50 -100 -200 -500
SSTPAD
-5 -10 -20 -50
UNITS
pA
CONDITIONS
VR = -20V
Derate 2mW/°C above 25°C Derate 2.8mW/°C above 25°C
NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissions discovered in its use.
NJ Semi-Conductors encourages customers to verify that datasheets are current before placing orders.
Quality Semi-Conductors
Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by JPADs D-i and D2. Common Mode Input voltage limited by JPADs D3 and D4 to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset voltages fed capacitively from the JFET switch gate.
FIGURE 1
JPAD20
O I
D1]
o 0 1 D3V
> <
& 1[ D2
~i [ D4
\
"\7
"t" ^-^^
^
+ 15V -15V
FIGURE 2
CONTROL SIGNAL c
+V -V JPADS
D1
2N4393
+V o D2
2N4117A
R VOUT
o
TO-72
Three Lead
0.195 0.175 DIA.
0.230 0.209 0.030
MAX.
3 LEADS 0.019 DIA.
0.016 0.100
0.500 VIIN.
45"
A
0.046 4
DIA.
TO-92
0046 0060
0014 0070
DMMilQNS NMCtES
0.048
0.036 0.028
SOT-23
DIMENSIONS IN MILLIMETERS
1. Absolute maximum ratings are limiting values above which serviceability may be impaired.
2. The PAD type number denotes its maximum reverse current value in pico amperes. Devices with IR values intermediate to those shown are available upon request.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
