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MOS FIELD EFFECT TRANSISTOR

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

2SK3115

SWITCHING

N-CHANNEL POWER MOS FET INDUSTRIAL USE

DESCRIPTION

The 2SK3115 is N-Channel DMOS FET device that features a low gate charge and excellent switching haracteristics, and designed for high voltage applications such as switching power supply, AC adapter.

FEATURES

• Low gate charge

QG = 26 nC TYP. (VDD = 450 V, VGS = 10 V, ID = 6.0 A)

• Gate voltage rating ±30 V

• Low on-state resistance

RDS(on) = 1.2 Ω MAX. (VGS = 10 V, ID = 3.0 A)

• Avalanche capability ratings

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage (VGS = 0 V) VDSS 600 V Gate to Source Voltage (VDS = 0 V) VGSS ±30 V Drain Current (DC) (TC = 25°C) ID(DC) ±6.0 A

Drain Current (pulse) Note1 ID(pulse) ±24 A

Total Power Dissipation (TA = 25°C) PT1 2.0 W Total Power Dissipation (TC = 25°C) PT2 35 W

Channel Temperature Tch 150 °C

Storage Temperature Tstg −55 to +150 °C

Single Avalanche Current Note2 IAS 6.0 A

Single Avalanche Energy Note2 EAS 24 mJ

Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%

2. Starting Tch = 25°C, VDD = 150 V, RG = 25 Ω, VGS = 20 → 0 V

ORDERING INFORMATION

PART NUMBER PACKAGE

2SK3115 Isolated TO-220

(Isolated TO-220)

(2)

ELECTRICAL CHARACTERISTICS (TA = 25°C)

Characteristics Symbol Test Conditions MIN. TYP. MAX. Unit

Zero Gate Voltage Drain Current IDSS VDS = 600 V, VGS = 0 V 100 µA

Gate Leakage Current IGSS VGS = ±30 V, VDS = 0 V ±100 nA

Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 2.5 3.5 V

Forward Transfer Admittance | yfs| VDS = 10 V, ID = 3.0 A 2.0 S

Drain to Source On-state Resistance RDS(on) VGS = 10 V, ID = 3.0 A 0.9 1.2 Ω

Input Capacitance Ciss VDS = 10 V 1100 pF

Output Capacitance Coss VGS = 0 V 200 pF

Reverse Transfer Capacitance Crss f = 1 MHz 20 pF

Turn-on Delay Time td(on) VDD = 150 V, ID = 3.0 A 18 ns

Rise Time tr VGS(on) = 10 V 12 ns

Turn-off Delay Time td(off) RG = 10 Ω, RL = 50 Ω 50 ns

Fall Time tf 15 ns

Total Gate Charge QG VDD = 450 V 26 nC

Gate to Source Charge QGS VGS = 10 V 6 nC

Gate to Drain Charge QGD ID = 6.0 A 10 nC

Body Diode Forward Voltage VF(S-D) IF = 6.0 A, VGS = 0 V 1.0 V

Reverse Recovery Time trr IF = 6.0 A, VGS = 0 V 1.4 µs

Reverse Recovery Charge Qrr di/dt = 50 A/µs 6.5 µC

TEST CIRCUIT 3 GATE CHARGE VGS = 20 → 0 V

PG.

RG = 25 Ω 50 Ω

D.U.T.

L

VDD

TEST CIRCUIT 1 AVALANCHE CAPABILITY

PG.

D.U.T.

RL

VDD

TEST CIRCUIT 2 SWITCHING TIME

RG

PG.

IG = 2 mA

50 Ω D.U.T.

RL

VDD

ID

VDD

IAS

VDS

BVDSS

Starting Tch

VGS

0

τ = 1 µs Duty Cycle ≤ 1%

τ

VGS Wave Form

VDS Wave Form

VGS

VDS

010%

0 90%

90%

90%

VGS(on)

VDS

ton toff

td(on) tr td(off) tf 10% 10%

(3)

TYPICAL CHARACTERISTICS (TA = 25°C)

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA

Tch - Channel Temperature - ˚C

dT - Percentage of Rated Power - %

0 20 40 60 80 100 120 140 160 100

80

60

40

20

0

TC - Case Temperature - ˚C

PT - Total Power Dissipation - W

0 20 40 60 80 100 120 140 160 80

60

40

20

TOTAL POWER DISSIPATION vs.

CASE TEMPERATURE

FORWARD BIAS SAFE OPERATING AREA

10 100 1000

ID - Drain Current - A

1

VDS - Drain to Source Voltage - V 100

10

1

0.1

Power Dissipation Limited

100 µs

10 ms 1 ms 100

ms PW

= 10 µs RDS(on)

Limited

ID(pulse)

ID(DC)

TC = 25˚C Single Pulse

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

PW - Pulse Width - s

r th (t) - Transient Thermal Resistance - ˚C/W

100 m 1 10 100 1000

10 m 100 µ 1 m

10 µ 100

10

1

0.1

0.01

Rth(ch-A) = 62.5˚C/W

Rth(ch-C) = 3.57˚C/W

(4)

DRAIN CURRENT vs.

DRAIN TO SOURCE VOLTAGE

VDS - Drain to Source Voltage - V

ID - Drain Current - A

10 20 30 40

5 15 20

10

0 25

6 V VGS = 10 V

8 V

Pulsed

FORWARD TRANSFER CHARACTERISTICS

VGS - Gate to Source Voltage - V

ID - Drain Current - A

15 10

5 0

100

10

1.0

0.1

VDS = 10 V Pulsed Tch = 125˚C

75˚C

Tch = 25˚C

−25˚C

GATE CUT-OFF VOLTAGE vs.

CHANNEL TEMPERATURE

Tch - Channel Temperature - ˚C

VGS(off) - Gate Cut-off Voltage - V

−50 0 50 100 150

5.0

4.0

3.0

2.0

1.0

0

VDS = 10 V ID = 1mA

FORWARD TRANSFER ADMITTANCE vs.

DRAIN CURRENT

1.0 10

ID - Drain Current - A

| yfs | - Forward Transfer Admittance - S

10

0.1 1.0

0.1 VDS = 10 V Pulsed

Tch = −25˚C 25˚C 75˚C 125˚C

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

GATE TO SOURCE VOLTAGE

8 16 20

2.0

VGS - Gate to Source Voltage - V

RDS (on) - Drain to Source On-state Resistance -

ID = 6.0 A 3.0 A

1.0

0 4 12

Pulsed

0

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT

1.0 10 100

0.8

ID - Drain Current - A

RDS(on) - Drain to Source On-state Resistance -

0.4 2.0

0 1.2 1.6

VGS = 10 V 20 V

Pulsed

(5)

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

CHANNEL TEMPERATURE

50 150

RDS (on) - Drain to Source On-state Resistance -

ID = 6.0 A 3.0 A 2.0

0−50 0 100

Tch - Channel Temperature - ˚C 3.0

1.0

VGS = 10 V Pulsed

SOURCE TO DRAIN DIODE FORWARD VOLTAGE

VSD - Source to Drain Voltage - V

ISD - Diode Forward Current - A

1.5 1.0

0.5 0

100

10

1.0

0.1

Pulsed 0 V

VGS = 10 V

1000 100

10 1.0

10000

1000

100

10

1

CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

Ciss, Coss, Crss - Capacitance - pF

Ciss

Coss

Crss

VDS - Drain to Source Voltage - V VGS =0V

f=1MHz

SWITCHING CHARACTERISTICS

0.1 1 10

ID - Drain Current - A

td(on), tr, td(off), tf - Switching Time - ns

100

10

1

0.1

VDD =150V VGS = 10V RG =10 td(off)

td(on)

tf

tr

REVERSE RECOVERY TIME vs.

DRAIN CURRENT

1.0 10 100

trr - Reverse Recovery Time - ns

0.1

ID - Drain Current - A 10000

1000

100

10

di/dt = 50 A/µs VGS = 0 V

Qg - Gate Charge - nC

VDS - Drain to Source Voltage - V

0 10 20 30 40

600

400

200

DYNAMIC INPUT/OUTPUT CHARACTERISTICS

VGS - Gate to Source Voltage - V

16 14 12 10 8 6 4 2 0 ID = 6 A

VGS

VDD = 450 V 300 V 120 V

VDS

(6)

SINGLE AVALANCHE CURRENT vs.

INDUCTIVE LOAD

100 µ 1 m 10 m

100

L - Inductive Load - H

IAS - Single Avalanche Current - A

1.0 10

0.110 µ RG = 25 Ω VDD = 150 V VGS = 20 → 0 V Starting Tch = 25˚C

EAS = 24 mJ IAS = 6 A

SINGLE AVALANCHE ENERGY DERATING FACTOR

75 125 150

120

100

80

60

40

20

0

Starting Tch - Starting Channel Temperature - ˚C

Energy Derating Factor - %

50 100

25

VDD = 150 V RG = 25 Ω VGS = 20 → 0 V IAS ≤ 6 A

PACKAGE DRAWING (Unit: mm)

10.0 ± 0.3

3.2 ± 0.2 φ 4.5 ± 0.2

2.7 ± 0.2

2.5 ± 0.1 0.65 ± 0.1 1.5 ± 0.2

2.54 1.3 ± 0.2

2.54 0.7 ± 0.1

4 ± 0.2

15.0 ± 0.3 12.0 ± 0.2

3 ± 0.1

1 2 3

1.Gate 2.Drain 3.Source

13.5MIN.

Isolated TO-220(MP-45F)

Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade

the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred.

EQUIVALENT CIRCUIT

Body Diode

Source (S) Drain (D)

Gate (G)

(7)

[MEMO]

(8)

M8E 00. 4

The information in this document is current as of January, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.

No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.

NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others.

Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information.

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"Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below.

Customers must check the quality grade of each semiconductor product before using it in a particular application.

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The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application.

(Note)

(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.

(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).

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