Further scientific news by TU Delft Colophon DO-Archive
Groovy chips
Microelectronics that listen as well as think
Henk Klomp
The microchip in the car sends the chip at home a message that you’re on your way. The chip at home tells the chip at the bathtub to have a hot bath ready when you arrive. Until recently, this was pure science-fiction, since the components required for wireless
communication would never fit together on one
microchip without causing interference. But now dimes, the TU Delft institute for micro- and nanoelectronics, has conquered the interference monster. They have managed to make the first cheap microchips that not only think, but can also listen to each other and communicate. The research project was sponsored by stw, the Dutch Science Foundation.
The microchips of chemical engineer Nga Pham, from Vietnam, look a bit like minute oriental symbols, with their fine tracery of lines, spirals, and planes.
‘This is our integrated chip’, she says, pointing at a photograph. ‘In addition to a processor, the chip also contains all the components required for wireless communication. These components are known as passive components, and include inductors, capacitors, and transformers. Everything is incorporated in a single chip, only the antenna remains separate.’
The Delft chip is the first successful attempt to bring together the two fastest growing factors of technology, bandwidth and processing speed. Processing speed has
Dismantled GSM cell phone set. In addition to a number of large ICs, these devices contain many discrete components. The high-frequency (RF) components of the transmitter/ receiver section in particular are kept away from the integrated electronics to prevent crosstalk problems. This is the reason why metal screens are fitted to separate these components from the other circuit boards. Below: RF electronics of the GSM phone without their metal screen.
been increasing explosively, doubling every two years, without making computers more expensive. Since the nineteen-nineties, bandwidth has expanded even faster. The combination of the two could open the doors to a whole new world of technology.
In the future, according to a European Union prognosis, people will be surrounded by unobtrusive minute microchips. They will be present in clothes, watches, and keys. This is known as ambient intelligence, or in colloquial terms, electronic fabrics. The chips are invisible, and communicate with other chips that could be built into walls or cars. The system would make it possible to automatically control the interior climate at home, make payments, monitor the medical condition of outpatients, all using wireless communication. Pham’s chip is a precursor of these systems.
‘Look at these recesses’, she says. ‘They are what makes it work. They are on the back of the chip. These dimples, grooves and slots have made it possible to combine large bandwidth with a high processor speed in a single chip.’
Old-fashioned cell phones
They may appear to be state-of-the-art,’ Pham’s supervisor, Joachim Burghartz of dimes explains, ‘but on the inside today’s cell phones are pretty old-fashioned. Until now, the industry’s main concern has been to generate profit, without creating sufficient breakthroughs. For example, the passive part of the electronics is still completely separate from the active part. The passive part is the communication bit, the active part is the bit processing information.’ Open a cell telephone, and you will notice that the active chip is separate from the analogue components of the transmitter/receiver circuitry, which consists of inductors, capacitors, and transformers. These
components are located on a separate circuit board and connected to the chip section by wires. In addition, the various circuit boards are often fitted with metal screens. Each separate component will easily cost 1 to 2 euro cents, bringing the cost of the complete electronics for a cell phone to about 100 euro.
If the passive components could also be placed into silicon substrate, the electronics would become much cheaper to manufacture.
‘Ultimately, the cost could be reduced from one hundred euros to a single euro,’ Burghartz says, ‘and that would eventually create the possibility of designing «electronic fabrics».’
Passive components
Wireless communication using radio waves is impossible without passive components. A microchip works with electric currents, and without the passive components, radio waves could not be fed into an electrical circuit without having the radio wave reflected. It works a bit like shaking the loose end of a rope attached to a wall. The resulting wave will travel along the rope, only to be reflected back by the wall. In the same way, a radio wave will be reflected if the resistance — called impedance — of the electrical circuit is too high.
Schematic diagram of a GSM cell phone
If the DIMES technique can be used to mount the RF components on a single chip together with the other electronics, this will result in a considerable reduction of the number of components in GSM cell phones.
Even at zero impedance, feeding the radio wave into the circuit would not work, since the amplitude of the signal would become uncontrollable, as the wave in the rope becomes uncontrollable when you untie the other end from the wall. The task of the passive components is to subdue the wave.
‘A circuit consisting of inductors, capacitors, and transformers can be configured to absorb practically all the energy of the radio wave. Such a circuit is a bit like a sounding board that resonates if you hit it with the right frequency’, Burghartz explains.
Basically, you could even go so far as to make them operate entirely on the energy of the radio waves, a bit like having cell phones without batteries. Chips on foodstuffs could then transmit the price to the cash register, so the girl at the checkout would no longer have to pass each article separately through the price scanner. A single radio scan would be sufficient to determine the price for all the articles in a shopping trolley.
Crosstalk
Any passive component can be incorporated into an active chip. A transmission line becomes a metal strip, an inductor becomes a wire laid out in a spiral, a transformer can be made by interweaving two spirals, and a capacitor is made by juxtaposing two metal squares.
‘The problem is that passive components huddled together on a chip will start to «chatter»’, Burghartz says. ‘They will cause interference due to what is known as crosstalk. Crosstalk becomes more of a problem as the frequency of the waves increases. Higher frequencies offer greater bandwidth. Transmission at 6 gigahertz is about to start, and there are plans to use frequencies ten times as high. The chatter between the passive components will be deafening.’
Grounding
The solution has been known for ages: grounding! An alternative is to put the most sensitive components in the famous Faraday’s cage. This will cut out the interference, but how does one go about putting these minute components on a microchip into such a cage? ‘Simple, you work from the bottom up’, Burghartz characterises the Delft solution. ‘It’s only the «top ten layer», the upper ten micrometres, of a chip that is active. Even so a chip can easily be half millimetre thick. According to our calculations, a wafer won’t break until it is one-eight of a millimetre thin. This means that we can locally scoop out the chip from below. If you do this the right way, each passive component can be locked into an imaginary cage.’ To do so, the Delft scientists etched grooves, slots, and dimples in the rear of the chip. The surface of the grooves and slots is then coated with a thin layer of conducting material, which forms the ground shield for the radio signal.
Some dimples pass all the way through the chip to connect the ground shield with contact points on the front of the chip. Each contact point is located between two passive components to form a barrier against
Combining RF components with other components on a single IC will also mean that the electronics will take up less space. Although this may not be of much use in cell phone (which most people already find difficult to operate due to the small size of the buttons), it will be a giant step forward for interactive communication electronics for use in clothing and based on protocols such as Blue Tooth.
Cross sections silicon chips, each with a specific RF component problem
Solutions for the above problems realized using Nga Pham’s etching technique on the rear of an IC. A major benefit of her technique is that it can be used on microchips that are finished on top.
crosstalk. The ground shield reduces crosstalk by as much as five to ten times.
But there is more to come. The ground shield also greatly improves the performance of the passive components.
‘Try to imagine,’ Burghartz explains, ‘a signal-carrying wire with ground as much as half a millimetre away, with the carrier silicon in between. All the carrier silicon does is reinforce the top ten layers, but it also causes power loss, and more so if the current on the signal wire shoots to and fro millions of times a second. The thinner the silicon, the lower the power loss will be. So,
scooping out the bottom means extra gain.’ Rough etchings
Pham was given the assignment of finding a way to create the ground shield with a minimum of process steps. The microchip industry is a highly conservative environment. New techniques do not stand a chance of being used unless they provide lots of benefits with very little change.
‘The etching pattern consists of two levels’, Pham explains. ‘At the first level, 150 micrometres below the transistor chip – i.e. at a depth of 350 micrometres looking at the rear of the chip — is the ground surface. The second level reaches up to the contact points on the top surface.’
The relatively rough pattern can be produced using a low-cost technique, since the industry’s experience with such etching techniques stretches back a few decades. Microelectronic mechanical systems (MEMS) use silicon chips to measure such parameters as differential pressure. Another example is the sensor that deploys a car airbag. The silicon has been cleverly hollowed out inside these sensor chips.
‘The industry practically always uses the cheap base, potassium hydroxide, the chemical formula of which is KOH’, Pham says, ‘The nice thing about this etchant is that it removes the exposed silicon crystal layer by layer, with an exact angle of 54.7 degrees between the top of the wafer and the recess. This results in a hole with a flat bottom and sloping sides. Even the rate at which the etchant removes a layer of crystal is exactly known. This means that you can precisely determine how deep the crystal will be recessed by allowing the etchant to act for a set period of time.’
Three process steps
The etching method proved to be easy to incorporate into the current mass production process of microchips. Until recently, the etching method was banned because even a few errant potassium ions are sufficient to destroy a transistor.
‘This is why we start by applying protective layers on both sides of the chip as soon as the active part is finished’, Burghartz explains. ‘The layer also serves as the bed to which the metal lines, inductors, capacitors and transformers are applied.’
In the second step, the chip is turned over to apply the ground plane .
‘We can apply the entire pattern using only two masks. The first mask contains the pattern of the grounding
A) The production process of the transistors on the top surface completed, a mask is used to apply the photo resist layer to the rear of the wafer. B) The first etching step using potassium hydroxide (KOH), in which the geometry (depth) of the ground plane is determined by the etching time. C) A layer of silicon nitride (SiN) is applied in a recess with a depth of 390 µm. This is followed by a second masking step to define the connecting hole to the top layer. D) The second KOH etching step to create the insulation groove and the connecting hole. The etching process stops as soon as the top SiN layer is reached. E) A layer of SiN is applied at low temperature, followed by lithography and etching to open the contact in the deep hole. F) Sputter technology is used to apply a layer of aluminium. G) An innovative part of the process is the application of a photo resist layer of even thickness, which is important to ensure that the pattern is transferred accurately in and across the deep recesses. H) H) After lithography of the pattern, the unexposed photo resist is dissolved. I) I)With the dry etching of the aluminium completed and the remains of the photo resist removed, the process is completed.
surface, and the second mask defines the location of the holes that connect to the contact points on the top’, Burghartz says.
The most obvious etching method was to apply the holes first and then to add the ground plane. ‘The first mask is used to define openings in the protecting layer,’ Pham explains, ‘and then you use the KOH to etch the holes. This is carefully timed. As soon as you reach a certain depth, the process is halted. At that point you have a chip with holes in the right places. Then you use the second mask to define the ground surface, using KOH to remove the remaining silicon. If your timing is right, or so we thought, the ground plane would be exactly positioned when the etchant in the holes reaches the contact points on the front.’
Unfortunately, this etching method did not work. The two patterns turned out to be shifted slightly in relation to each other.
Pham: ‘The edge of the recess is where things go wrong. At that point, the crystal is no longer flat, so instead of removing the layers of crystal at an angle of 54.7 degrees, the etchant eats it away at an angle of roughly 30 degrees, messing up the whole plan.’ The second simplest method turned out to work as planned. Pham simply reversed the order of etching by first etching the pattern for the ground surface, followed by the pattern for the contact points.
‘The ground surface can be applied with accuracy. We then apply a protective layer to the ground surface, using the second mask to open it up in the spots where we want the holes. You can then etch down to the contact points without loss of resolution.’
Spirals
The Delft technique can be used to convert a processor chip in three steps into a chip that can talk and listen as well as think. Since on average, the manufacturing process of a processor chip requires twenty to thirty steps, three extra steps will not require much extra investment. On top of that, the extra process steps are relatively cheap. This means that the new chip will not have to cost much more than a normal chip, and that would appear to be the key to a world of electronic fabrics.
In the meantime, the Delft scientists are busy looking for other ways to utilise the grooves and slots on the back of the chip.
‘The spirals for the inductors still take up most of the available space’, Burghartz explains. ‘If you apply them to the textured rear as well as to the top of the chip, the size of the chips could be reduced by half again.’ ‘The only snag,’ Pham says, ‘is in applying a smooth protective layer to form the ground plane. We are currently testing a new spraying system at the laboratory that may solve that last problem.’ n
For more information please contact
Ms. Nga Pham, phone +31 15 278 1237, e-mail
nga@dimes.tudelft.nl, or
Prof. Joachim N. Burghartz, phone +31 15 278 8612, e-mail burgh@dimes.tudelft.nl, or
The photo resist layer is applied to a slowly rotating wafer by an ultrasonic spray nozzle producing droplets less than 20 micro metres in diameter.
Prof. Pasqualina M. Sarro, phone +31 15 278 7708, e-mail http://www.delftoutlook.tudelft.nl/
info/mailto_sarro_dimes.tudelft.html
Rear of a wafer after wet etching (step D of the production process). Next, a layer of aluminium is applied to the underside. In some situations, e.g. the problem situations A, B, and C, applying the aluminium layer is the last step of the manufacturing process.
Cross-section of a structure with two levels, made in two etching steps.
Rear of a wafer with photo resist (step H of the production process).
SEM view of an etching experiment to establish a galvanic connection between the top and bottom sides of the wafer. The first step creates a plateau at a depth of 150 µm from the top surface of the wafer. Next, a layer of aluminium is sputtered onto the surface. In a second etching stage, four holes were created that each forms a connection with the top of the wafer.
Spiral inductor on the bottom surface of a recess in the rear of a wafer. The surface lies at a depth of 375 µm. Normally an inductor like this (typical dimensions 200 x 200 µm2; see also the next illustration) would be placed alongside the other components on a chip, but the use of Pham’s new etching technique allows it to be integrated on the rear of a chip, saving a considerable amount of silicon real estate, and consequently, money.
Another example of holes connecting the top and bottom sides of a wafer. This figure shows the rear of the contact points on the top layer.
Spiral inductor integrated in the top surface of a chip by means of conventional IC technology.
The complete rear of a wafer, coated with a layer of
aluminium, which is the last step in the process (step I in the production diagram).
Close-up of the previous image.
Example of a structure in which lithographic techniques have been used to create extremely thin conductor strips.
Close-up of the previous image, showing a conductor strip at the top of the sharp edge.
