2SK2826

(1)

MOS FIELD EFFECT TRANSISTOR

2SK2826

SWITCHING

N-CHANNEL POWER MOS FET INDUSTRIAL USE

DESCRIPTION

The 2SK2826 is N-Channel MOS Field Effect Transistor designed for high current switching applications.

FEATURES

• Super Low On-state Resistance

RDS(on)1 = 6.5 mΩ MAX. (VGS = 10 V, ID = 35 A) RDS(on)2 = 9.7 mΩ MAX. (VGS = 4.0 V, ID = 35 A)

• Low Ciss : Ciss = 7200 pF TYP.

• Built-in Gate Protection Diode

ABSOLUTE MAXIMUM RATINGS (T

A

= 25°C)

Drain to Source Voltage (VGS = 0 V) VDSS 60 V Gate to Source Voltage (VDS = 0 V) VGSS(AC) ±20 V Gate to Source Voltage (VDS = 0 V) VGSS(DC) +20, –10 V Drain Current (DC) (TC = 25°C) ID(DC) ±70 A Drain Current (pulse)^Note1 ID(pulse) ±280 A Total Power Dissipation (TC = 25°C) PT1 100 W Total Power Dissipation (TA = 25°C) PT2 1.5 W

Channel Temperature Tch 150 °C

Storage Temperature Tstg –55 to + 150 °C

Single Avalanche Current^Note2 IAS 70 A

Single Avalanche Energy^Note2 EAS 490 mJ

Notes 1. PW ≤ 10 µ s, Duty cycle ≤ 1%

2. Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 → 0 V

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ORDERING INFORMATION

PART NUMBER PACKAGE

2SK2826 TO-220AB

2SK2826-S TO-262

2SK2826-ZJ TO-263

2SK2826-Z TO-220SMD^Note Note TO-220SMD package is produced only in Japan.

(TO-220AB)

(TO-262)

(TO-263, TO-220SMD)

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(2)

Data Sheet D11273EJ3V0DS

2

ELECTRICAL CHARACTERISTICS (T

A

= 25°C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Zero Gate Voltage Drain Current IDSS VDS = 60 V, VGS = 0 V 10 µ A

Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µ A

Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.0 1.5 2.0 V

Forward Transfer Admittance | yfs| VDS = 10 V, ID = 35 A 20 94 S

Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 35 A 5.5 6.5 mΩ

RDS(on)2 VGS = 4.0 V, ID = 35 A 7.0 9.7 mΩ

Input Capacitance Ciss VDS = 10 V 7200 pF

Output Capacitance Coss VGS = 0 V 2000 pF

Reverse Transfer Capacitance Crss f = 1 MHz 700 pF

Turn-on Delay Time td(on) ID = 35 A 100 ns

Rise Time tr VGS = 10 V 1200 ns

Turn-off Delay Time td(off) VDD = 30 V 440 ns

Fall Time tf RG = 10 Ω 520 ns

Total Gate Charge QG ID = 70 A 150 nC

Gate to Source Charge QGS VDD = 48 V 20 nC

Gate to Drain Charge QGD VGS = 10 V 40 nC

Body Diode Forward Voltage VF(S-D) IF = 70 A, VGS = 0 V 0.97 V

Reverse Recovery Time trr IF = 70 A, VGS = 0 V 80 ns

Reverse Recovery Charge Qrr di/dt = 100A/µ s 250 nC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

RG = 25 Ω 50 Ω PG.

L

VDD

VGS = 20 → 0 V

BVDSS

IAS

ID

VDS

Starting Tch

VDD

D.U.T.

TEST CIRCUIT 3 GATE CHARGE

TEST CIRCUIT 2 SWITCHING TIME

PG. RG

0 VGS

D.U.T.

RL

VDD

τ = 1 sµ Duty Cycle ≤ 1%

VGS Wave Form

ID Wave Form

VGS

10%

90%

010%

ID

90%

td(on) tr td(off) tf 10%

τ

ID

0

ton toff

PG. 50 Ω

D.U.T.

RL

VDD

IG = 2 mA

(3)

TYPICAL CHARACTERISTICS (T

A

= 25°C)

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA

TC - Case Temperature - ˚C

dT - Percentage of Rated Power - %

0 20 40 60 80 100 120 140 160

20 40 60 80 100

TOTAL POWER DISSIPATION vs.

CASE TEMPERATURE

TC - Case Temperature - ˚C

PT - Total Power Dissipation - W

0 20 40 60 80 100 120 140 160

140 120 100 80 60 40 20

FORWARD BIAS SAFE OPERATING AREA

ID - Drain Current - A

VDS - Drain to Source Voltage - V 1

10 100

0.1 1 10

T^C = 25˚C Single Pulse 0.1

100 R^DS(on)

Limited

ID(pulse) PW = 10 µs 1 ms

10 ms DC

1000

100 µs

100 ms ID(DC)

Power Dissipation Limited

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

˚C/W

10

0.01 0.1 1 100 1000

Rth(ch-A) = 83.3 ˚C/W

Rth(ch-C) = 1.25 ˚C/W

★

(4)

4

DRAIN CURRENT vs.

DRAIN TO SOURCE VOLTAGE

VDS - Drain to Source Voltage - V

0 0.4 0.6 0.8

40 100

80

60

0.2

Pulsed

VGS =10 V

20

VGS = 4.0 V

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

GATE TO SOURCE VOLTAGE

VGS - Gate to Source Voltage - V

RDS(on) - Drain to Source On-state Resistance - mΩ

0 10

10 30

20 30

Pulsed

20

TA = 25˚C ID = 35 A

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT

10

10 20

30

100 1000

Pulsed

0

VGS = 10 V VGS = 4.0 V

GATE CUT-OFF VOLTAGE vs.

CHANNEL TEMPERATURE

VGS(off) - Gate Cut-off Voltage - V _0.5

VDS = 10 V ID = 1 mA

1.0 1.5 2.0

- 50 0 50 100 150

0

200 Tch - Channel Temperature - ˚C FORWARD TRANSFER CHARACTERISTICS

V^GS- Gate to Source Voltage - V

1 10 100

1000 Pulsed

0 2 4

TA = –25˚C 25˚C 75˚C 125˚C

6 8

VDS = 10 V

FORWARD TRANSFER ADMITTANCE vs.

DRAIN CURRENT

| yfs | - Forward Transfer Admittance - S

VDS=10V Pulsed

0.1 1.0

10 100

0.1

1.0 TA = 175˚C

75˚C 25˚C –25˚C VGS = 0V

(5)

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

CHANNEL TEMPERATURE

Tch - Channel Temperature - ˚C

0 - 50 5

0 50 100 150

ID = 25 A 10

20

15

VGS = 10 V VGS = 4.0 V

SOURCE TO DRAIN DIODE FORWARD VOLTAGE

1.0

ISD - Diode Forward Current - A

0 1.5

VSD - Source to Drain Voltage - V 0.5

Pulsed

0.1 1 10 100

0 V VGS = 10 V

1000

CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

Ciss, Coss, Crss - Capacitance - pF

100 0.1 1000 10000 100000

1 10 100

VGS = 0 V f = 1 MHz

Coss

Crss

Ciss

SWITCHING CHARACTERISTICS

td(on), tr, td(off), tf - Switching Time - ns

10 0.1 100 1000 10000

1 10

tf

tr

td(on)

td(off)

100 VDD = 30 V VGS = 10 V RG = 10 Ω

REVERSE RECOVERY TIME vs.

DRAIN CURRENT

IF - Drain Current - A

trr - Reverse Recovery Time - ns

di/dt = 100 A/µs VGS = 0 V

1 0.1 10

1.0 10 100

1000

100

VGS - Gate to Source Voltage - V

DYNAMIC INPUT/OUTPUT CHARACTERISTICS

QG - Gate Charge - nC

0 50 100 150 200

20 40 60 80

2 4 VDD = 48 V

30 V 12 V

VDS

6 8 VGS

★

(6)

6

SINGLE AVALANCHE CURRENT vs.

INDUCTIVE LOAD

L - Inductive Load - H

| IAS | - Single Avalanche Current - A VDD = 30 V

RG = 25 Ω

10 µ 100 µ

10 100

1 m 10 m

1.0

IAS= 70 A E_AS

= 490 mJ

VGS = 20 → 0 V

SINGLE AVALANCHE ENERGY DERATING FACTOR

Starting Tch - Starting Channel Temperature - ˚C

Energy Derating Factor - %

25 50 75 100

60 40 20 0 160 140

125 150 120

100 80

VDD = 30 V RG = 25 Ω VGS=20→0V

IAS ≤ 70 A

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PACKAGE DRAWINGS (Unit: mm)

1) TO-220AB(MP-25)

4.8 MAX.

1.Gate 2.Drain 3.Source 4.Fin (Drain) 1 2 3

10.6 MAX.

10.0

3.6±0.2

4

3.0±0.3

1.3±0.2

0.75±0.1

2.54 TYP. 2.54 TYP.

5.9 MIN.6.0 MAX. 15.5 MAX.12.7 MIN.

1.3±0.2

0.5±0.2 2.8±0.2 φ

2) TO-262(MP-25 Fin Cut)

4.8 MAX.

1.Gate 2.Drain 3.Source 4.Fin (Drain) 1 2 3

(10) 4

1.3±0.2

0.75±0.3

2.54 TYP. 2.54 TYP.

8.5±0.212.7 MIN.

1.3±0.2

0.5±0.2 2.8±0.2

1.0±0.5

3) TO-263 (MP-25ZJ)

(10)

1.4±0.2

1.0±0.5

2.54 TYP. 2.54 TYP.

8.5±0.2

1 2 3

5.7±0.4

4

2.8±0.2

4.8 MAX.

1.3±0.2

0.5±0.2 (0.5R)

(0.8R)

1.Gate 2.Drain 3.Source 4.Fin (Drain) 0.7±0.2

4) TO-220SMD(MP-25Z)^Note

(10)

1.4±0.2

1.0±0.5

2.54 TYP. 2.54 TYP.

8.5±0.2

1 2 3

3.0±0.5

1.1±0.4

4

2.8±0.2

4.8 MAX.

1.3±0.2

0.5±0.2 (0.5R)

(0.8R)

1.Gate 2.Drain 3.Source 4.Fin (Drain) 1.0±0.3

Note This package is produced only in Japan.

EQUIVALENT CIRCUIT

Body Diode Gate

Drain

Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage

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M8E 00. 4

The information in this document is current as of April, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.

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(Note)

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