74LVC257A



  

74LVC257A

Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State)

Product specification

Superceded data of 1997 Sep 26 IC24 Data Handbook

1998 Jul 29

FEATURES

•

Wide supply voltage range of 1.2 to 3.6 V

•

In accordance with JEDEC standard no. 8-1A

•

CMOS lower power consumption

•

Direct interface with TTL levels

•

Output drive capability 50
transmission lines at 85°C

•

5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic

DESCRIPTION

The 74LVC257A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment.

The 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1l₀ to 4l₀) are selected when input S is LOW and the data inputs from source 1 (1l₁ to 4l₁) are selected when S in HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.

The 74LVC257A is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high impedance OFF-state when OE is HIGH.

QUICK REFERENCE DATA

GND = 0 V; T_amb = 25°C; t_r =t_f ≤ 2.5 ns

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT

t_PHL/t_PLH

Propagation delay nl₀, nl₁ to nY S to nY

C_L = 50 pF;

V_CC = 3.3 V 3.9

3.5

ns

C_I Input capacitance 5.0 pF

C_PD Power dissipation capacitance per channel V_I = GND to V_CC¹ 30 pF

NOTE:

1. C_PD is used to determine the dynamic power dissipation (P_D in µW) P_D = C_PD × VCC2 × fi
 (C_L × VCC2 × fo) where:

f_i = input frequency in MHz; C_L = output load capacitance in pF;

f_o = output frequency in MHz; V_CC = supply voltage in V;

 (C_L × VCC2 × fo) = sum of the outputs.

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

16-Pin Plastic SO –40°C to +85°C 74LVC257A D 74LVC257A D SOT109-1

16-Pin Plastic SSOP Type II –40°C to +85°C 74LVC257A DB 74LVC257A DB SOT338-1

16-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC257A PW 74LVC257APW DH SOT403-1

PIN CONFIGURATION

1 2

3 4 5 6 S 1I₀

1I₁ IY 2l₀ 2l₁

V_CC

OE 4l₀ 16 15

14 13 12 11

7

GND 8

3l₁

3Y 10

9 2Y

4l₁ 4Y 3l₀

LOGIC SYMBOL

SV00637

1 S

OE 2

1I₀ 11_I 2I₀ 2I₁ 3I₀ 3I₁ 4I₀ 4I₁ 3 5

4 1Y

6

7 2Y

10

12 4Y

14 11

9 3Y

13

15

74LVC257A Quad 2-input multiplexer with 5 Volt tolerant

inputs/outputs (3-State)

1998 Jul 29 3

PIN DESCRIPTION

PIN

NUMBER SYMBOL FUNCTION

1 S Common data select input

2, 5, 11, 14 1l₀ to 4l₀ Data inputs from source 0 3, 6, 10, 13 1l₁ to 4l₁ Data outputs from source 1 4, 7, 9, 12 1Y to 4Y 3-State multiplexer outputs

8 GND Ground (0 V)

15 OE 3-State output enable input (active LOW)

16 V_CC Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

SV00638 EN

G1 15

1

7 4

9

12 6

5 3

2 MUX

1

11 10 14 13

1

FUNCTIONAL DIAGRAM

SV00639 OE

S

SELECTOR 3–STATE

MULTIPLEXER OUTPUTS 1I₀

1Y

2Y

3Y

4Y 1I₁

2I₀ 2I₁

3I₀ 3I₁

4I₀ 4I₁

1 15

7 4

9

12 6

5 2 3

11 10

14 13

FUNCTION TABLE

INPUTS OUTPUTS

OE S nl₀ nl₁ nY

H X X X Z

L H X L L

L H X H H

L L L X L

L L H X H

NOTES:

H = HIGH voltage level L = LOW voltage level X = don’t care

Z = high impedance OFF-state

LOGIC DIAGRAM

SV00640 OE

1Y

2Y

3Y

4Y 1I₁

1I0

2I₁ 2I₀

3I₁

3I₀

4I₁

4I₀

S

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS LIMITS

UNIT

SYMBOL PARAMETER CONDITIONS

MIN MAX UNIT

V_CC DC supply voltage (for max. speed performance) 2.7 3.6

V V_CC

DC supply voltage (for low-voltage applications) 1.2 3.6 V

V_I DC input voltage range 0 5.5 V

V_O DC input voltage range; output HIGH or LOW state 0 V_CC

V V_O

DC output voltage range; output 3-State 0 5.5 V

T_amb Operating free-air temperature range –40 +85 °C

t_r, t_f Input rise and fall times V_CC = 1.2 to 2.7V

V_CC = 2.7 to 3.6V

0 0

20

10 ns/V

ABSOLUTE MAXIMUM RATINGS

¹

In accordance with the Absolute Maximum Rating System (IEC 134); Voltages are referenced to GND (ground = 0V)

SYMBOL PARAMETER CONDITIONS RATING UNIT

V_CC DC supply voltage –0.5 to +6.5 V

I_IK DC input diode current V_It0 –50 mA

V_I DC input voltage Note 2 –0.5 to +5.5 V

I_OK DC output diode current V_O uV_CC or V_Ot 0 "50 mA

V_O DC output voltage; output HIGH or LOW Note 2 –0.5 to V_CC +0.5

V V_O

DC output voltage; output 3-State Note 2 –0.5 to 6.5 V

I_O DC output source or sink current V_O = 0 to V_CC "50 mA

I_GND, I_CC DC V_CC or GND current "100 mA

T_stg Storage temperature range –65 to +150 °C

Power dissipation per package

P_TOT – plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500

– plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 500 mWmW NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

74LVC257A Quad 2-input multiplexer with 5 Volt tolerant

inputs/outputs (3-State)

1998 Jul 29 5

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions voltages are referenced to GND (ground = 0V)

LIMITS

SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT

MIN TYP¹ MAX

V HIGH level Input voltage

V_CC = 1.2V V_CC

V V_IH HIGH level Input voltage

V_CC = 2.7 to 3.6V 2.0 V

V LOW level Input voltage

V_CC = 1.2V GND

V V_IL LOW level Input voltage

V_CC = 2.7 to 3.6V 0.8 V

V_CC = 2.7V; V_I = V_IH or V_IL; I_O = –12mA V_CC*0.5 V_O HIGH level output voltage V_CC = 3.0V; V_I = V_IH or V_IL; I_O = –100µA V_CC*0.2 V_CC

V V_OH HIGH level output voltage

V_CC = 3.0V; V_I = V_IH or V_IL; I_O = –18mA V_CC*0.6

V

V_CC = 3.0V; V_I = V_IH or V_IL; I_O = –24mA V_CC*0.8

V_CC = 2.7V; V_I = V_IH or V_IL; I_O = 12mA 0.40 V_OL LOW level output voltage V_CC = 3.0V; V_I = V_IH or V_IL; I_O = 100µA GND 0.20 V

V_CC = 3.0V; V_I = V_IH or V_IL; I_O = 24mA 0.55

I Input leakage current V_CC= 3 6V; V = 5 5V or GND "0 1 "5 µA

I_I Input leakage current V_CC = 3.6V; V_I = 5.5V or GND "0.1 "5 µA

I_OZ 3-State output OFF-state current V_CC = 3.6V; V_I = V_IH or V_IL; V_O = V_CC or GND 0.1 "5 µA

I_OFF Power off leakage current V_CC = 0.0V; V_I or V_O = 5.5V 0.1 "10 µA

I_CC Quiescent supply current V_CC = 3.6V; V_I = V_CC or GND; I_O = 0 0.1 10 µA

∆I_CC Additional quiescent supply current per

input pin V_CC = 2.7V to 3.6V; V_I = V_CC –0.6V; I_O = 0 5 500 µA

NOTES:

1. All typical values are at V_CC = 3.3V and T_amb = 25°C.

AC CHARACTERISTICS

GND = 0 V; t_r = t_fv 2.5 ns; C_L = 50 pF; R_L = 500
; T_amb = –40
C to +85
C

LIMITS

SYMBOL PARAMETER WAVEFORM V_CC = 3.3V ±0.3V V_CC = 2.7V V_CC = 1.2V UNIT

MIN TYP¹ MAX MIN TYP¹ MAX TYP

t_PHL/t_PLH

Propagation delay nl₀ to nY nl₁ to nY

Figures 1, 3 1.5 3.9 5.1 1.5 3.3 6.1 11 ns

t_PHL/t_PLH Propagation delay

S to nY Figures 1, 3 1.5 3.5 6.4 1.5 4.3 7.5 14 ns

t_PZH/t_PZL 3-state output enable time

OE to nY Figures 2, 3 1.5 3.7 6.5 1.5 4.6 7.5 15 ns

t_PHZ/t_PLZ 3-state output disable time

OE to nY Figures 2, 3 1.5 3.2 5.2 1.5 3.5 6.2 12 ns

NOTE:

1. These typical values are at V_CC = 3.3V and T_amb = 25°C.

AC WAVEFORMS

V_M = 0.5 × V_CC at V_CC< 2.7 V V_M = 1.5 V at V_CC≥ 2.7 V V_X = V_OL + 0.3 V at V_CC≥ 2.7 V V_X = V_OL + 0.1 ×V_CC at V_CC < 2.7 V V_Y = V_OH – 0.3 V at V_CC≥2.7V V_Y = V_OH – 0.1 × V_CC at V_CC< 2.7 V

V_OL and V_OH are the typical output voltage drop that occur with the output load.

SV00641 V_M

S, nI₀, nI₁ INPUTS

nY OUTPUT V_M

t_PLH t_PHL

GND V_CC

V_OL V_OH

Figure 1. Input (S, nl₀, nl₁) to output (nY) propagation delays.

SV00642 outputs

disabled outputs enabled outputs

enabled

t_PHZ t_PZH

t_PZL t_PLZ

OUTPUT HIGH-to-OFF OFF-to-HIGH OUTPUT LOW-to-OFF OFF-to-LOW

V_M V_M

OE INPUT

V_X V_OL

V_OH

V_Y GND

GND V_CC V_I

V_M

Figure 2. 3-state enable and disable times.

TEST CIRCUIT

PULSE GENERATOR

V_I

R_T D.U.T.

V_O

C_L 50pF S₁

2 x V_CC Open GND 500Ω

500Ω

V_CC V_I

2.7V V_CC 2.7V – 3.6V 2.7V

Test S₁

GND t_PLZ/t_PZL 2 x V_CC t_PHZ/t_PZH

t_PLH/t_PHL Open

SY00003 V_CC

Figure 3. Load circuitry for switching times.

74LVC257A Quad 2-input multiplexer with 5 Volt tolerant

inputs/outputs (3-State)

1998 Jul 29 7

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

74LVC257A Quad 2-input multiplexer with 5 Volt tolerant

inputs/outputs (3-State)

1998 Jul 29 9

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409

Sunnyvale, California 94088–3409 Telephone 800-234-7381

 Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A.

print code Date of release: 08-98

Document order number: 9397-750-04504

Data sheet status Objective specification Preliminary specification

Product specification

Product status Development

Qualification

Production

Definition ^[1]

This data sheet contains the design target or goal specifications for product development.

Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.

Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

Data sheet status

[1] Please consult the most recently issued datasheet before initiating or completing a design.