MOS FIELD EFFECT TRANSISTOR
2SK3061
SWITCHING
N-CHANNEL POWER MOS FET INDUSTRIAL USE
DESCRIPTION
The 2SK3061 is N-Channel MOS Field Effect Transistor designed for high current switching applications.
FEATURES
• Low on-state resistance
RDS(on)1 = 8.5 mΩ MAX. (VGS = 10V, ID = 35A) RDS(on)2 = 12 mΩ MAX. (VGS = 4.0V, ID = 35A)
• Low Ciss: Ciss = 5200pF TYP.
• Built-in gate protection diode
• Isolated TO-220 package
ABSOLUTE MAXIMUM RATINGS (T
A= 25°C)
Drain to Source Voltage (VGS = 0 V) VDSS 60 V Gate to Source Voltage (VDS = 0 V) VGSS(AC) ±20 V Gate to Source Voltage (VDS = 0 V) VGSS(DC) +20, –10 V Drain Current (DC) (TC = 25°C) ID(DC) ±70 A Drain Current (pulse) Note1 ID(pulse) ±280 A
Total Power Dissipation (TC = 25°C) PT1 35 W
Total Power Dissipation (TA = 25°C) PT2 2.0 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg –55 to +150 °C
Single Avalanche Current Note2 IAS 35 A
Single Avalanche Energy Note2 EAS 122.5 mJ
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 30 V, RG = 25Ω, VGS = 20 → 0 V
ORDERING INFORMATION
PART NUMBER PACKAGE
2SK3061 Isolated TO-220
(Isolated TO-220)
★
2
ELECTRICAL CHARACTERISTICS (T
A= 25°C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Zero Gate Voltage Drain Current IDSS VDS = 60 V, VGS = 0 V 10 µA
Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA
Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.0 1.5 2.0 V
Forward Transfer Admittance | yfs| VDS = 10 V, ID = 35 A 20 87 S
Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 35 A 6.3 8.5 mΩ
RDS(on)2 VGS = 4.0 V, ID = 35 A 8.2 12 mΩ
Input Capacitance Ciss VDS = 10 V 5200 pF
Output Capacitance Coss VGS = 0 V 1300 pF
Reverse Transfer Capacitance Crss f = 1 MHz 480 pF
Turn-on Delay Time td(on) ID = 35 A 75 ns
Rise Time tr VGS = 10 V 1150 ns
Turn-off Delay Time td(off) VDD = 30 V 360 ns
Fall Time tf RG = 10 Ω 480 ns
Total Gate Charge QG ID = 70 A 95 nC
Gate to Source Charge QGS VDD = 48 V 13 nC
Gate to Drain Charge QGD VGS = 10 V 30 nC
Body Diode Forward Voltage VF(S-D) IF = 70 A, VGS = 0 V 0.97 V
Reverse Recovery Time trr IF = 70 A, VGS = 0 V 70 ns
Reverse Recovery Charge Qrr di/dt = 100 A/µs 140 nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
RG = 25 Ω 50 Ω PG.
L
VDD
VGS = 20 → 0 V
BVDSS
IAS
ID
VDS
Starting Tch
VDD
D.U.T.
TEST CIRCUIT 3 GATE CHARGE
TEST CIRCUIT 2 SWITCHING TIME
PG. RG
0 VGS
D.U.T.
RL
VDD
τ = 1 sµ Duty Cycle ≤ 1%
VGS Wave Form
ID Wave Form
VGS
10%
90%
010%
ID
90%
90%
td(on) tr td(off) tf 10%
τ
ID
0
ton toff
PG. 50 Ω
D.U.T.
RL
VDD
IG = 2 mA
TYPICAL CHARACTERISTICS (T
A= 25°C)
DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREATC - Case Temperature - °C
dT - Percentage of Rated Power - %
0 20 40 60 80 100 120 140 160
20 40 60 80 100
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
TC - Case Temperature - °C
PT - Total Power Dissipation - W
0 20 40 60 80 100 120 140 160
70 60 50 40 30 20 10
FORWARD BIAS SAFE OPERATING AREA
ID - Drain Current - A
VDS - Drain to Source Voltage - V 1
10 100
0.1 1 10
TC = 25˚C Single Pulse 0.1
100
Power Dissipation Limited
RDS(on)
LimitedID(DC)
ID(pulse) PW = 10 µs 10 ms 1 ms
DC
1000
100 µs 100 ms
★
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
- Transient Thermal Resistance - ˚C/W
10
0.01 0.1 1 100 1000
Rth(ch-C)= 3.57 ˚C/W Rth(ch-A)= 62.5 ˚C/W
4
FORWARD TRANSFER CHARACTERISTICS
VGS - Gate to Source Voltage - V
ID - Drain Current - A
0.1 1 10 100
0 1 2 3 4 5
Pulsed VDS = 10 V TA = 125˚C
75˚C 25˚C
−25˚C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
VDS - Drain to Source Voltage - V
ID - Drain Current - A
0 2 3 4
200
1
Pulsed
VGS = 10 V
VGS = 4.0 V
100
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
ID - Drain Current - A
| yfs | - Forward Transfer Admittance - S VDS = 10 V
Pulsed
0.1 1.0
1 10 100
10 100
Tch = −25˚C 25˚C 75˚C 125˚C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
0 5
20
10 30
10 15
Pulsed
ID = 35 A
DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT
ID - Drain Current - A
RDS(on) - Drain to Source On-state Resistance - mΩ
1 0.1
30
10 100
0 10 20
Pulsed
10 V VGS = 4.0 V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
Tch - Channel Temperature - ˚C
VGS(off) - Gate Cut-off Voltage - V
VDS = 10 V ID = 1 mA
−50 0 50 100 150
0 1.0 2.0
1.5
0.5
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
Tch - Channel Temperature - ˚C
RDS(on) - Drain to Source On-state Resistance -mΩ
0 −50 5
0 50 100 150
ID = 35 A 10
20
15
VGS = 4.0 V
10 V
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
VSD - Source to Drain Voltage - V
ISD - Diode Forward Current - A
0.1
0 1 10 100
0.5
Pulsed
1 1.5
0 V VGS = 4.0 V
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
VDS - Drain to Source Voltage - V
Ciss, Coss, Crss - Capacitance - pF
0.1 0.1 1 10 100
1 10 100
VGS = 0 V f = 1 MHz
Ciss
Coss
Crss
SWITCHING CHARACTERISTICS
ID - Drain Current - A
td(on), tr, td(off), tf - Switching Time - ns
0.1 10 100 1000 10000
1 10 100
VDS = 30 V VGS = 10 V RG = 10 Ω
td(off)
td(on)
tr
tf
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
trr - Reverse Recovery Time - ns
di/dt = 100 A / VGS = 0 V
µs
1 0.1 10
1 10 100
1000
100
VGS - Gate to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
VDS - Drain to Source Voltage - V
0 25 50 75 100
20 40 60 80
2 4 6 8
0 VDD = 12 V
30 V 48 V
12 14 16
10 ID = 70 A VGS = 10 V
6
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
L - Inductive Load - H
IAS - Single Avalanche Current - A
1.0 10 100
1 m 10 m
RG = 25 Ω VDD = 30 V VGS = 20 → 0 V Starting Tch = 25°C
IAS = 35 A
10µ 100µ
0.1
EAS = 122.5
mJ
SINGLE AVALANCHE ENERGY DERATING FACTOR
Starting Tch - Starting Channel Temperature - ˚C
Energy Derating Factor - %
25 50 75 100
160 140 120 100 80 60 40 20
0 125 150
VDD = 30 V RG = 25 Ω VGS = 20 → 0 V IAS ≤ 35 A
PACKAGE DRAWING (Unit: mm)
10.0 ± 0.3
3.2 ± 0.2 φ 4.5 ± 0.2
2.7 ± 0.2
2.5 ± 0.1 0.65 ± 0.1 1.5 ± 0.2
2.54 1.3 ± 0.2
2.54 0.7 ± 0.1
4 ± 0.2
15.0 ± 0.3 12.0 ± 0.2
3 ± 0.1
1 2 3
1.Gate 2.Drain 3.Source
13.5MIN.
Isolated TO-220 (MP-45F)
Body Diode
Source (S) Drain (D)
Gate (G)
EQUIVALENT CIRCUIT
Gate Protection Diode
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.
M8E 00. 4
The information in this document is current as of April, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.
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