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MOS FIELD EFFECT TRANSISTOR

2SK3204

SWITCHING

N-CHANNEL POWER MOS FET INDUSTRIAL USE

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

DESCRIPTION

The 2SK3204 is N-Channel MOS Field Effect Transistor designed for high current switching applications.

FEATURES

• Low on-state resistance :

RDS(on)1 = 34 mΩ MAX. (VGS = 10 V, ID = 8 A) RDS(on)2 = 50 mΩ MAX. (VGS = 4 V, ID = 8 A)

• Low Ciss :Ciss = 940 pF TYP.

• Built-in gate protection diode.

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage (VGS = 0 V) VDSS 60 V Gate to Source Voltage (VDS = 0 V) VGSS(AC) ±20 V Gate to Source Voltage (VDS = 0 V) VGSS(DC) +20, −10 V Drain Current (DC) (TC= 25 °C) ID(DC) ±15 A Drain Current (pulse) Note1 ID(pulse) ±45 A Total Power Dissipation (TA= 25°C) PT 1.8 W

Channel Temperature Tch 150 °C

Storage Temperature Tstg −55 to +150 °C

Single Avalanche Current Note2 IAS 15 A

Single Avalanche Energy Note2 EAS 22.5 mJ

Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%

2. Starting Tch = 25°C, VDD = 30V, RG = 25Ω, VGS = 20→ 0 V

ORDERING INFORMATION

PART NUMBER PACKAGE

2SK3204 MP-10

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ELECTRICAL CHARACTERISTICS (TA = 25°C)

PARAMATERS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Zero Gate Voltage Drain Current IDSS VDS = 60 V, VGS = 0 V 10 µA

Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA

Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.0 1.5 2.0 V

Forward Transfer Admittance | yfs| VDS = 10 V, ID = 8 A 8.0 14 S

RDS(on)1 VGS = 10 V, ID = 8 A 25 34 mΩ

Drain to Source On-state Resistance

RDS(on)2 VGS = 4 V, ID = 8 A 35 50 mΩ

Input Capacitance Ciss 940 pF

Output Capacitance Coss 290 pF

Reverse Transfer Capacitance Crss

VDS = 10 V VGS = 0 V

f = 1 MHz 120 pF

Turn-on Delay Time td(on) 17 ns

Rise Time tr 150 ns

Turn-off Delay Time td(off) 58 ns

Fall Time tf

VDD = 30 V, ID = 8 A VGS = 10 V RG = 10 Ω

52 ns

Total Gate Charge QG 25 nC

Gate to Source Charge QGS 2.9 nC

Gate to Drain Charge QGD

VDD = 48 V VGS(on) = 10 V

ID = 15 A 7.5 nC

Body Diode Forward Voltage VF(S-D) IF = 15 A, VGS = 0 V 0.92 V

Reverse Recovery Time trr 45 ns

Reverse Recovery Charge Qrr

IF = 15 A, VGS = 0 V

di/dt = 100 A/µs 81 nC

TEST CIRCUIT 3 GATE CHARGE VGS = 20 0 V

PG.

RG = 25 Ω 50 Ω

D.U.T.

L

VDD

TEST CIRCUIT 1 AVALANCHE CAPABILITY

PG. RG = 10 Ω D.U.T.

RL

VDD

TEST CIRCUIT 2 SWITCHING TIME

RG

PG.

IG = 2 mA

50 Ω D.U.T.

RL

VDD

ID

VDD

IAS

VDS

BVDSS

Starting Tch

VGS

0

τ = 1 µs Duty Cycle 1%

τ

VGS Wave Form

ID Wave Form

VGS

ID 010%

0

90%

90%

90%

ID

ton toff td(on) tr td(off) tf

10% 10%

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TYPICAL CHARACTERISTICS (TA = 25°C)

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA

TC - Case Temperature - ˚C

dT - Percentage of Rated Power - %

00 20 40 60 80 100 120 140 160 20

40 60 80 100

TOTAL POWER DISSIPATION vs.

CASE TEMPERATURE

TC - Case Temperature - ˚C

PT - Total Power Dissipation - W

0 0

20 40 60 80 100 120 140 160 2.8

2.4 2.0 1.6 1.2 0.8 0.4

FORWARD BIAS SAFE OPERATING AREA

VDS - Drain to Source Voltage - V

ID - Drain Current - A

10

1

0.1 100

0.1 1000

1 10 100

ID(pulse)

ID(DC)

PW = 10 µs

1 ms 10 ms Power Dissipation Limited

TA = 25˚C Single Pulse

100 µs

100 ms RDS(on)

Limited (at V

GS = 10 V)

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

rth(t) - Transient Thermal Resistance - ˚C/W

10

0.01 0.1 1 100 1 000

1 m 10 m 100 m 1 10 100 1000

Single Pulse Rth(ch-A) = 69.4˚C/W

TA = 25˚C

10 µ 100 µ

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FORWARD TRANSFER CHARACTERISTICS

VGS - Gate to Source Voltage - V

ID - Drain Current - A

1

0.1 10 100

Pulsed 2

0 4 6 8

VDS = 10 V TA = −25˚C

25˚C 75˚C 125˚C

DRAIN CURRENT vs.

DRAIN TO SOURCE VOLTAGE

VDS - Drain to Source Voltage - V

ID - Drain Current - A

00 1 2 3

40 80

60

Pulsed VGS = 10 V

20 VGS = 4.0 V

FORWARD TRANSFER ADMITTANCE vs.

DRAIN CURRENT

ID - Drain Current - A

| yfs | - Forward Transfer Admittance - S VDS = 10 V

Pulsed

0.1 1

10 100

10 100

0.1 1

TA = 125˚C 75˚C 25˚C −25˚C

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

GATE TO SOURCE VOLTAGE

VGS - Gate to Source Voltage - V

RDS(on) - Drain to Source On-State Resistance - m

0 10

25 75

20 Pulsed

50

ID = 8 A

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT

ID - Drain Current - A

RDS(on) - Drain to Source On-State Resistance - m

20 10

0.1 1 10

50 40 30 80 70 60

100 Pulsed

0

VGS = 4.0 V VGS = 10 V

GATE TO SOURCE CUT-OFF VOLTAGE vs.

CHANNEL TEMPERATURE

VGS(off) - Gate to Source Cut-off Voltage - V

0.5

VDS = 10 V ID = 1 mA

1.0 1.5 2.0

−50 0 50 100 150

0

Tch - Channel Temperature - ˚C

(5)

SOURCE TO DRAIN DIODE FORWARD VOLTAGE

1.0

ISD - Diode Forward Current - A

0 1.5

VSD - Source to Drain Voltage - V 0.5

Pulsed

0.01 0.1 1 10 100

0 V VGS = 10 V

SWITCHING CHARACTERISTICS

ID - Drain Current - A

td(on), tr, td(off), tf - Switching Time - ns

1 0.1 10 100 1000

1 10 100

VDD = 30 V VGS = 10 V RG = 10 Ω

VDS =10 V Pulsed

tr

tf

td(off)

td(on)

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

CHANNEL TEMPERATURE

Tch - Channel Temperature - ˚C

RDS(on) - Drain to Source On-state Resistance - m

0 −50 10 20

0 50 100 150

ID = 8 A

40

30 60

50

Pulsed

VGS = 4.0 V

VGS = 10 V

CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

VDS - Drain to Source Voltage - V

Ciss, Coss, Crss - Capacitance - pF

0 0.1 0.1

1 10

1 10 100

VGS = 0 V f = 1 MHz

Coss

Crss

Ciss

REVERSE RECOVERY TIME vs.

DRAIN CURRENT

IF - Drain Current - A

trr - Reverse Recovery Time - ns

di/dt = 100 A/µs VGS = 0 V

1 0.1 10

1 10 100

1000

100

VGS - Gate to Source Voltage - V

DYNAMIC INPUT/OUTPUT CHARACTERISTICS

QG - Gate Charge - nC

VDS - Drain to Source Voltage - V

00 10 20 30 40

20 40 60 80

4 2 0 8 6 VDD = 48 V

30 V 12 V

12 10 16 14

VGS

ID = 15 A VGS = 10 V VDS

(6)

SINGLE AVALANCHE CURRENT vs.

INDUCTIVE LOAD

L - Inductive Load - H

| IAS | - Single Avalanche Current - A VDD = 30 VRG = 25 Ω

10 100

10 100

1 m 10 m

0.1 1

IAS = 15 A

EAS = 22.5 mJ

VGS = 20 → 0 V Starting Tch = 25˚C µ µ

SINGLE AVALANCHE ENERGY DERATING FACTOR

Starting Tch - Starting Channel Temperature - ˚C

Energy Derating Factor - %

25 50 75 100

60 40 20 0 160 140

125 150 175 120

100 80

VDD = 30 V RG = 25 Ω VGS = 20 → 0 V IAS ≤ 15 A

(7)

PACKAGE DRAWING (Unit: mm)

MP-10

Remark The diodeconnected between the gate and source of the transistorserves as a protector against ESD.

When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.

EQUIVALENT CIRCUIT

Source Body Diode

Gate Protection Diode Gate

Drain

1 2 3

1.Gate 2.Drain 3.Source

13.0±0.22.5±0.2

1.4±0.2 1.4±0.2 8.0±0.2

4.5±0.2

0.5±0.1 0.5±0.1 0.5±0.1

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M8E 00. 4

The information in this document is current as of April, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.

No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.

NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others.

Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information.

While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features.

NEC semiconductor products are classified into the following three quality grades:

"Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below.

Customers must check the quality grade of each semiconductor product before using it in a particular application.

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The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application.

(Note)

(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.

(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).

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