Index of /rozprawy2/11429

Pełen tekst

(1)AGH University of Science and Technology Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering Department of Measurement and Electronics. PH. D. DISSERTATION. Development of high-speed hybrid pixel detectors for experiments with synchrotron radiation. M. Sc. Anna Kozioł. Thesis Supervisor: Dr. Piotr Maj. Cracow, 2018.

(2)

(3) Akademia Górniczo-Hutnicza im. Stanisława Staszica w Krakowie Wydział Elektrotechniki, Automatyki, Informatyki i Inżynierii Biomedycznej Katedra Metrologii i Elektroniki. ROZPRAWA DOKTORSKA. Budowa i rozwój szybkich detektorów hybrydowych dla potrzeb eksperymentów synchrotronowych. mgr inż. Anna Kozioł. Promotor: dr hab. inż. Piotr Maj. Kraków, 2018.

(4)

(5) Składam serdeczne słowa podziękowania promotorowi, dr hab. inż. Piotrowi Majowi, za wszelką pomoc jakiej udzielił mi w czasie dotychczasowej współpracy, za zaangażowanie, oraz opiekę merytoryczną, dzięki którym możliwe było ukończenie niniejszej rozprawy doktorskiej..

(6)

(7) Abstract Development of high-speed hybrid pixel detectors for experiments with synchrotron radiation. Since the synchrotron radiation started to strongly influence research areas, many fields of science, such as physics, chemistry or biology, experienced rapid advancement of conducted experiments. The especially important progress occurred owing to the 3rd generation of synchrotrons offering about one billion times more intense beam than conventional X-ray sources. In modern facilities, also the storage ring filling pattern is settable. By generating short-duration pulses of highly intense synchrotron light, it is possible to study time-dependent properties of the materials. So-called time-resolved experiments allow analyzing dynamic changes at the material atomic level down to nanosecond resolution. Despite an access to the high-quality beam, the experiments prepared at synchrotron beamline do not always run with the performance desired by the scientists. One of the causes are limited parameters of the devices detecting X-ray radiation. In practice, it is challenging to build a detector that satisfies all experiment requirements, therefore often the compromise between the detector features and scientists’ desires is made. Over time, the development of better detectors has become an urgent need, which is intensely growing especially as synchrotron beam parameters are constantly improved. The dissertation shows the Authors effort on the design of detectors systems dedicated to timeresolved experiments and their experimental verification. All three detectors are built based on the UFXC detector which is single-photon counting hybrid pixel array detector (HPAD) designed at AGH University of Science and Technology. The first system designed and prepared by the Author is dedicated to Pump-Probe-Probe experiment and was designed as a response to request from CRISTAL beamline at Synchrotron SOLEIL, Saint-Aubin, France. The main features of the detector are its high frame rate, up to 21 000 fps, and very low 120 ns observation time. The detector allows isolating single packets of photons emitted in 150 ns intervals and consequently enables acquiring diffraction patterns taken at very short moments of time. Furthermore, it is the first HPAD-based detector that enables collecting not only the main one but also the reference image during Pump-Probe type of experiment. The second system designed and prepared by the Author is dedicated for X-ray Photon Correlation Spectroscopy (XPCS) experiment performed at 8-ID-I beamline at Argonne Photon Source Synchrotron, Lemont, Il, US. The detector enables 1 200 000 fps frame rate in a burst mode, 7.

(8) which is almost two decades higher rate than presented by any other HPAD-based detector. The hybrid mode introduced by the Author allowed greatly increasing the time resolution for multi-speckle XPCS by using UFXC HPAD, reaching sampling times continuously spanning from 826 ns to 52.8 s, so nearly eight decades in delay time, what was never reached before. The last system designed and built by the Author is a demo-version of a stand-alone low-cost embedded device utilizing a single software platform for all necessary targets including FPGA, RealTime OS, and Windows OS. The system designed shows an excellent performance and allows the image transfer over standard TCP/IP interface as well as a robust and high-speed channel link interface with the speed exceeding 7 000 fps.. 8.

(9) Abstrakt Budowa i rozwój szybkich detektorów hybrydowych dla potrzeb eksperymentów synchrotronowych. Pojawienie się promieniowania synchrotronowego pozwoliło na przeprowadzania nowych badań w obrębie takich nauk jak fizyka, chemia czy biologia, przyczyniając się do ich gwałtownego rozwoju. Szczególnie istotny postęp miał miejsce po pojawieniu się trzeciej generacji synchrotronów, oferujących wiązkę o milion razy większej intensywności niż konwencjonalne źródła promieniowania rentgenowskiego. W nowoczesnych ośrodkach, możliwa jest ponadto modyfikacja samego wypełnienia cyklu synchrotronu. Dzięki generacji krótkich impulsów o dużej intensywności, możliwe jest badanie właściwości materiałów pozostających w zależności od czasu. Tak zwane eksperymenty time-resolved pozwalają na badanie dynamicznych właściwości materiałów na poziomie atomów oraz w rozdzielczości czasowej rzędu nanosekund. Pomimo dostępu do wysokiej jakości wiązki, naukowcom pracującym w ośrodkach synchrotronowych nie zawsze udaje się uruchomić eksperyment z pożądaną jakością. Jedną z przyczyn są ograniczone parametry urządzeń przeprowadzających detekcję promieniowania. W praktyce, budowa detektora, który spełnia wszystkie stawiane mu wymogi jest trudna i niejednokrotnie. wypracowywany. jest. kompromis. pomiędzy. oczekiwaniami. naukowców,. a rzeczywistymi możliwościami systemu detekcyjnego. Z biegiem czasu, problem budowy detektorów o lepszych parametrach staje się coraz bardziej naglący, tym bardziej biorąc pod uwagę fakt, że jakość samej wiązki nieprzerwanie ulega poprawie. W niniejszej rozprawie Autorka przedstawia trzy autorskie systemy zbudowane dla potrzeb eksperymentów typu time-resolved wraz z wynikami pomiarowymi otrzymanymi z ich wykorzystaniem. Wszystkie trzy systemy zostały zbudowane przez Autorkę w oparciu o detektor UFXC, będący hybrydowym detektorem pikselowym (ang. HPAD) pozwalającym na pracę w trybie zliczania pojedynczych fotonów. Pierwszy przedstawiony w rozprawie i zbudowany przez Autorkę system został zrealizowany na potrzeby eksperymentu Pump-Probe-Probe dla linii CRISTAL na synchrotronie SOLEIL, SaintAubin, Francja. Głównymi zaletami detektora jest wysoka liczba zliczeń obrazów na sekundę, rzędu 21 000 obr/sek, a także bardzo krótki, 120 nanosekundowy czas otwarcia przysłony. Detektor pozwala na. wyizolowanie. pojedynczego. pakietu. fotonów. spośród. pakietów. emitowanych. w 150 nanosekundowych odstępach czasowych, a tym samym umożliwia obserwację stanu struktury. 9.

(10) atomowej kryształu w niezwykle krótkim przedziale czasowym. Ponadto, jest to pierwszy detektor typu HPAD pozwalający na zbieranie zarówno obrazu dyfrakcyjnego, jak i obrazu referencyjnego. Drugi prezentowany system dedykowany jest pomiarom X-Ray Photon Correlation Spectroscopy (XPCS) przeprowadzanym na linii 8-ID-I na synchrotronie Argonne Photon Source w Lemont, Illinois, Stany Zjednoczone Ameryki Północnej. System umożliwia akwizycję obrazu z prędkością 1 200 000 obr/sek w trybie „burst”, co jest wynikiem prawie dwie dekady większym niż prezentowane w innych istniejących detektorach typu HPAD. Dzięki dodatkowemu połączeniu dwóch trybów pracy w detektorze, możliwe stało się znaczne zwiększenie rozdzielczości czasowej w eksperymentach multi-speckle XPCS i rozciągnięcie osi czasu między 826 nanosekundami a 52.8 sekundy, czyli prawie osiem dekad, co do tej pory nie zostało nigdy zaprezentowane w tego typu eksperymencie. Ostatnim omawianym detektorem jest projekt autonomicznego i niskobudżetowego urządzenia wykorzystującego graficzny język programowania dla wszystkich trzech warstw oprogramowania, włączając w to FPGA, system czasu rzeczywistego oraz system operacyjny Windows.. 10.

(11) Contents. ACRONYMS AND ABBREVIATIONS .........................................................................................................13 1.. THESIS ORGANIZATION ..............................................................................................................15. 2.. INTRODUCTION ...........................................................................................................................17 2.1. 2.2. OUTLINE............................................................................................................................ 17 2.1.1. Synchrotron Radiation ........................................................................................................ 17. 2.1.2. Detection of X-ray Radiation ............................................................................................. 19. COMPARISON. OF. EXISTING. SPC. DETECTOR. SOLUTIONS. FOR. SYNCHROTRON RADIATION ............................................................................................. 23 2.2.1. Radiation hardness.............................................................................................................. 23. 2.2.2. Pixel size............................................................................................................................. 23. 2.2.3. Count rate ........................................................................................................................... 24. 2.2.4. Dynamic range.................................................................................................................... 24. 2.2.5. Frame rate ........................................................................................................................... 24. 2.2.6. Summary ............................................................................................................................ 25. 3.. DISSERTATION THESES ..............................................................................................................27. 4.. UFXC32K HYBRID PIXEL DETECTOR .......................................................................................29 4.1. 4.2. 4.3. 5.. DESCRIPTION .................................................................................................................... 29 4.1.1. Chip control blocks ............................................................................................................. 29. 4.1.2. Single pixel architecture ..................................................................................................... 30. THRESHOLD SCAN ............................................................................................................ 32 4.2.1. Iterative Offset Correction Algorithm ................................................................................ 35. 4.2.2. Fast Gain Correction Algorithm ......................................................................................... 38. SUMMARY ......................................................................................................................... 40. PUMP-PROBE-PROBE DETECTOR..............................................................................................41 5.1. PUMP-PROBE-PROBE EXPERIMENT INTRODUCTION ..................................................... 41. 5.2. DETECTION SYSTEM ........................................................................................................ 43 5.2.1. Hardware layers .................................................................................................................. 43. 11.

(12) 5.2.2. 5.3. 5.4. 6.. 7.. 8.. Software design .................................................................................................................. 45. MEASUREMENTS............................................................................................................... 47 5.3.1. Pump-Probe-Probe testing method ..................................................................................... 47. 5.3.2. Measurement setup ............................................................................................................. 48. 5.3.3. General detector characterization for the purpose of the experiment ................................. 49. 5.3.4. Detector speed characterization .......................................................................................... 52. SUMMARY ......................................................................................................................... 58. XPCS DETECTOR........................................................................................................................59 6.1. XPCS EXPERIMENT ......................................................................................................... 59. 6.2. DETECTION SYSTEM ........................................................................................................ 60. 6.3. MEASUREMENTS............................................................................................................... 64. 6.4. SUMMARY ......................................................................................................................... 66. EMBEDDED DETECTOR ...............................................................................................................67 7.1. INTRODUCTION ................................................................................................................. 67. 7.2. THE EMBEDDED DETECTOR DESIGN ................................................................................ 69 7.2.1. Hardware components ........................................................................................................ 70. 7.2.2. Software design .................................................................................................................. 72. 7.3. MEASUREMENTS............................................................................................................... 73. 7.4. SUMMARY ......................................................................................................................... 76. THESIS CONCLUSIONS .................................................................................................................77. LIST OF FIGURES ....................................................................................................................................79 LIST OF TABLES .....................................................................................................................................81 REFERENCES..........................................................................................................................................83. 12.

(13) ACRONYMS AND ABBREVIATIONS. ADC. – Analog to Digital Converter. AGH-UST. – AGH University of Science and Technology. ASIC. – Application-Specific Integrated Circuit. CCD. – Charge-Coupled Device. CSA. – Charge Sensitive Amplifier. DAC. – Digital to Analog Converter. DLS. – Dynamic Light Scattering. DMA. – Direct Memory Access. FEL. – Free-Electron Laser. fps. – frames per second. FWHM. – Full Width at Half Maximum. HPAD. – Hybrid Pixel Area Detector. I/O. – Input/Output. IC. – Integrated Circuit. LSB. – Least Significant Bit. Mcps. – Mega counts per second. MS/s. – Mega samples per second. OEM. – Original Equipment Manufacturer. OER. – Overall Energy Resolution. OS. – Operation System. PxP. – Pump-Probe. Px2P. – Pump-Probe-Probe. PSI. – Paul Scherrer Institut. RT. – Real-Time. RTOS. – Real-Time Operation System. SoC. – System On Chip. SOM. – System On Module 13.

(14) SPC. – Single Photon Counting. UFXC32k. – Ultra Fast X-Ray Chip. XPCS. – X-ray Photon Correlation Spectroscopy. 14.

(15) 1. THESIS ORGANIZATION The thesis organization is as follows: Section 2 states for dissertation theses. Section 3 describes the X-ray radiation at synchrotron sources and a practical use of single photon counting pixel detectors in synchrotron applications, especially when the high count rate and high frame rate is required. Only practically used solutions are described as a reference to work presented further in the dissertation. Section 4 describes UFXC32k hybrid pixel detector readout integrated circuit working in singlephoton counting mode. Discussed are the most important chip features and the new algorithms developed by the Author, allowing fast and precise trimming of the offsets and gains and implementable in low-memory embedded devices. Section 5 presents the detection system built to perform a first Pump-Probe-Probe experiment for CRYSTAL beamline at SOLEIL Synchrotron. The design of the detection system is explained and the results of the detector characterization and speed tests of the system are presented. Section 6 describes the system built for 8-ID-I beamline at Advanced Photon Source, Argonne National Laboratory, Argonne, USA. New chip operation mode was implemented in the readout system specifically for the need of small-angle XPCS experiments run at Argonne and is described in details. In addition, the analysis results after the first experiment performed with the use of the developed systems are presented. Section 7 discusses the handy, standalone 2-chip camera to be used as an alternative to the big and expensive detection systems. The innovation of the approach is highlighted and depends on the high abstraction level of the programming environment and high degree of integration between system components. Section 7 is the thesis summary and the Author main achievements.. 15.

(16) 16.

(17) 2. INTRODUCTION 2.1 Outline X-ray radiation is a form of electromagnetic radiation which is widely used for investigating properties of the materials in the vast majority of the natural sciences. One of the most known to the public society key characteristic of X-rays is the fact that different materials absorb X-ray photons to a different degree [1], [2], what makes the applications of X-ray absorption studies possible. This group includes medical X-ray imaging, computed tomography scan or baggage scanning at the airport. However, by applying specialized techniques it is possible to use X-ray to study materials in much higher, atomic resolution. The typical wavelength of X-ray ranges from 0.01 to 10 nanometers, which is few orders of magnitude smaller than a visible light and therefore allows observation of much smaller objects such as atoms and molecules (Fig. 2.1).. Fig. 2.1 Spectrum of electromagnetic waves, source: NASA [3] Since the wavelength of X-ray is comparable to the typical spacing between atoms in the solid material, therefore the waves that diffract on the atoms can be recorded as the diffraction pattern and individual atoms locations can be reconstructed [4], [5]. Consequently, the X-ray is also used in diffraction experiments and allows for structural analysis of the material. 2.1.1. Synchrotron Radiation Among many techniques allowing X-ray generation, two of them are very popular in the field. of material science to radiate a studied sample and those are the laboratory-based sources and the synchrotron facilities. The popular laboratory-based sources include an X-ray tube [6] or an X-ray generator, which uses a secondary target material as a target for high energy photons. The laboratorybased sources, however, are characterized with a limited power with the strongest ones being of the. 17.

(18) order of tens of kW, and therefore the photon flux is limited. The intensity generated by laboratorybased sources is usually sufficient when studying solid materials where the structure of the atom is motionless and the measurement result, which is a statistical information, may be averaged over time. If dynamic changes are studied, the subject of interest is the change of the location of the atoms at the short moments of time that requires a very short observation period. In order to get a meaningful information in a short observation time, the sample should be irradiated with high coherence and very bright (a large number of photons per second) beam [7].. Fig. 2.2 Illustration of a third-generation synchrotron facility A synchrotron is a facility capable of generating the X-ray radiation of a very high intensity [8], [9]. A synchrotron is a circular particle accelerator in which a charged particles circulate at extremely high, relativistic velocity around a closed-loop path, so-called storage ring (Fig. 2.2). Those circulating in the storage ring particles are initially generated in an electron gun (e-gun) and further accelerated in the linear accelerator (so-called linac) to energies of the order of hundreds of MeV before injection to the booster ring. The booster ring further accelerates the particles increasing the energy of about one order of magnitude to the range of GeV and periodically injects them to the storage ring to maintain the constant electron flux (such operation mode is called a top-up). In the storage ring, the particles are maintained on a path that consists of alternately distributed straight and arced sections, which shape the path into a circle. On the arced sections, the circulating particles are deflected and directed by an array of magnets, also called bending magnets. Straight sections are often used for insertion devices, wigglers and undulators. Both the insertion devices and bending magnets generate the synchrotron light (radiation), which is emitted by relativistic electrons when curved in a magnetic field. The instruments that create a narrow beam of high brilliance forward-directed radiation are insertion devices, whose light is orders of magnitude brighter than generated by bending magnets. Such generated synchrotron light is utilized during experiments performed at the beamlines. Beamlines are situated on the extension of the storage ring, along the insertion devices and 18.

(19) tangentially to the bending magnets. When generated, the synchrotron radiation passes through the beamline optics hutch, which includes optical devices used to modify beam parameters (Fig. 2.3). Especially, the monochromator selectively passes the wavelength of choice, and the set of mirrors enable to focus the beam on the sample. The experiment itself is performed inside beamline experimental hutch where X-ray detector collects experimental data.. Fig. 2.3 Transition path of synchrotron radiation in beamline hutch Today, most of the facilities providing synchrotron radiation are the third-generation synchrotrons, e.g. European Synchrotron Radiation Facility (ESRF) in Grenoble, France; Advanced Photon Source (APS) in Argonne, IL, US; Synchrotron SOLEIL in Paris, France; or SPring-8 in Sayo, Japan. While in second-generation facilities the synchrotron radiation is generated by bending magnets, third-generation synchrotrons are designed specifically to use undulators and wigglers as primary light sources. The third-generation synchrotron is optimized for the high brilliance of about five orders of magnitude higher than its predecessor and characterize with narrow and highly parallel beam [10], [11]. To increase the performance even more, fourth-generation of synchrotron, so-called Free Electron Lasers (FEL) [12] were proposed and first among them, MAX-IV in Sweden, has already begun its operation [13]. Fourth-generation synchrotrons offering, among other parameters, another few orders of magnitude higher brightness are hoped to open a new era for X-ray science. 2.1.2. Detection of X-ray Radiation Several different types of detectors have been already invented for X-ray detection, however,. Charge-Couple Devices (CCD) and Photon Counting Hybrid Pixel Area Detectors (HPAD) are most popular ones for synchrotron radiation applications [14]. In both types of detectors, CCD and HPAD, a radiation-sensitive material is used to convert the incoming X-ray photon into the electrically measurable signal suitable for the readout electronics. In order to provide spatial information on the photon impact, the detectors can be arranged in a single- or two-dimensional matrices of detection channels.. 19.

(20) CCD devices [15], [16] are the type of integrating detectors and are very popular due to the well-defined production process (low production cost) and a small pixel size. In the synchrotron facilities, the scintillator type detectors are most commonly used [13]. In CCD detectors a scintillator material can be used to detect X-ray photons. When the photon impinges the scintillator, it is converted into several photons of the visible light. The visible photons are then guided by optics fibers onto the photo-diode, where they generate electron-hole pairs. Such generated electrons are subsequently accumulated in potential wells of the pixels. Due to charge accumulation, CCD detectors are also called integrating type detectors. After single image acquisition, the accumulated charge is transferred well-to-well (pixel-to-pixel) to the amplifiers and then digitized by Analog to Digital Converters (ADC). The process itself is quite long and the collection time of single image varies between the detectors taking from microseconds to one second range.. Fig. 2.4 Illustration of charge generation and accumulation in CCD detector There are several known issues that influence measurement results of CCD detector [17] and they are illustrated in Fig. 2.4. Firstly, optics fiber contains radioactive elements which emit visible photons and consequently distort and introduce noise to the collected image. Secondly, not only the charge generated by the incoming photon is accumulated in wells but also the charge that stems from thermal noise, what leads to so-called dark current. Because the thermal noise increases, the signal-tonoise ratio cannot be simply improved by the longer recording time. To minimize the effect, CCD detectors are often cooled down to deep sub-zero temperature. Apart from the thermal noise, also the noise and distortion related to well-to-well transfer are added to the charge. The growing noise contribution influences the dynamic range of the detector, as presented in Fig. 2.5 (a).. 20.

(21) (a) (b) Fig. 2.5 Illustration of photons counting methods: (a) charge integration in CCD detectors (grey is the accumulated noise), (b) single photon counting in HPAD detectors with the applied discrimination level In CCD detectors, the maximum capacity of the well corresponds to several thousands of photons [18]. This is also an issue while measuring both strong and weak intensity reflections in the same image. In that case, potential wells might overflow towards neighboring wells for the stronger radiation leading to so-called blooming or saturation effects, while in weakly illuminated pixels the image statistics is still not sufficient. To overcome this issue, usually, several images of different observation time is collected, what, however, introduces the scaling problem. Finally, in integrating detectors the amount of charge accumulated in a well depends on the energy of the incoming X-ray photon and the total charge is summed up over a given period of time. Consequently, the information about the number of photons and their energy is valid only for monochromatic X-rays and even then, the uncertainty of the number of incoming photons may be significant due to the thermal noise. Detectors capable of counting each single X-ray photon are called single-photon counting (SPC) detectors and are most often designed as hybrid pixel area detectors (HPADs) (Fig. 2.6). In HPADs [19], the sensor (e.g. Si, CdTe, GaAs) is placed on the top of the readout electronics and it constitutes the first layer that interacts with the X-ray photon. After photon hit, electrical charge is generated in sensor material in a form of a cloud of electron-hole pairs. Beneath the sensor, the integrated circuit (IC) which is the readout electronics is placed and it is responsible for measuring the electrical signals from the sensor. The charge generated in the sensor is attracted to pixel electrode what induces generation of the electrical pulse signal in the pixel front-end electronics. A further way of the signal processing defines the functionality of the hybrid pixel detector. The signal may be 21.

(22) digitized, amplified, filtered and discriminated or any other variation depending on the application needs.. Fig. 2.6 Illustration of hybrid pixel detector. The red wave symbolizes X-ray photon impinging the sensor material generating electrical charge (purple dots). The charge is further attracted by the electrodes at the input of each pixel readout channel and process. With the use of discriminators, the generated pulse is compared to the threshold level and when exceeded, the signal is recognized as a valid event (Fig. 2.5 (b)). In this solution, only the photons above the selected energy threshold are counted and the noise contribution typical for CCD detectors is eliminated, regardless of the time of illumination, which leads to preservation of linear behavior over the entire dynamic range. When more than the one threshold is implemented in the detector, multi-energy radiation measurements become possible. Apart from the noise-free operation of the SPC detector and capability of counting single photons separately, very important for time-critical diffraction experiments is the high frame rate of the detection system, which is required to register the time-dependent high fidelity information. As mentioned before, in CCD detectors the pixels are read out serially by a single or few amplifiers, resulting in the readout speed of about tens of frames per second (fps). Such a value is too low for time-resolved experiments where the sample is gel or fluid in which at least thousands of frames per second are required. Despite the recent attempts to speed up CCD systems, e.g. 10 Mfps in burst mode presented in [20], the high speed is on the expense of the pixel size which is several dozens greater than in standard CCD detector, and greater by many SPC detectors. The SPC detectors usually present higher frame rate than standard CCD detectors and as digital information is kept in each pixel and no conversion time is needed. Many of HPADs have been commercialized in the last couple of years and few of them are broadly used in detection systems both in laboratories and synchrotron facilities. Most popular ones were developed by the detector group at the Paul Scherrer Institut (PSI) and are produced by its spin-off company called DECTRIS. These detectors are PILATUS (100K, 300K, 2M, 6M) [21], [22] and, smaller pixel-sized EIGER (1M, 4M, 16M) [23]–[25]. Other examples of commercially available HPAD detectors are those based on the 22.

(23) Medipix readout chip implemented by the group at DESY in e.g. commercial LAMBDA detectors [26], [27]. Similarly, the important role in modern synchrotron researches plays XPAD, by the French collaboration between Center for Particle Physics in Marseille, D2AM beamline at ESRF and Synchrotron SOLEIL [28], [29]. At last, HyPix 3000 cameras developed by Rigaku Corporation, Japan, uses PXD18k hybrid pixel detector developed by the ASIC design group at AGH University of Science and Technology (AGH-UST). While the above solutions show very good performance, it is still hard to find such a design that fits all the desired features at the same time, namely: a small pixel size and the ability to operate with high photon flux at very high frame rates allowing the time-resolved study at µs resolution. Of course, beamline scientists desire the highest available performance solving certain problems. One of the possible solutions to the problem is to propose a new, more optimized design of the SPC detector. To meet the scientists’ expectation, a new design was proposed by ASIC design group of the Department of Measurement and Electronics at AGH-UST. The design was supported by the National Centre for Research and Development, Poland, with the project PBS1/A3/12/2012, in the years 2012– 2016, and successfully realized in the form of UFXC [30] hybrid pixel detector. In theory, parameters of the UFXC detector are sufficient to meet scientists’ expectations but they should be verified in the experiments.. 2.2 Comparison of Existing SPC Detector Solutions for Synchrotron Radiation 2.2.1. Radiation hardness The use of the particle accelerator, such as a synchrotron facility, requires the detection system. to be resistant to the damage caused by ionizing radiation [31]. For this reason, the integrated circuit is designed with the technics that preserve radiation hardness, such as the use of enclosed gate transistor [32] or, in order to increase detector’s radiation tolerance, the small (130 nm and less) technology node is used for the design [33]. 2.2.2. Pixel size The size of the pixel is another important detector parameter as it determines the resolution of. the collected image. Very often it is a compromise between the better resolution and bigger functionality. Being able to detect the radiation on the possibly large area is another important aspect, and usually it is realized by combining multiple smaller detector modules to create one bigger area matrix. In time-resolved and diffraction experiments, however, the movements of atoms at short distances are measured and more important role plays the size of a single pixel. In the recent version of Pilatus detector, the pitch of the pixel is 172 µm while for XPAD it equals 130 µm. The detectors that possess pixels pitches below 100 µm are EIGER (75 µm), UFXC (75 µm) and Medipix (55 µm).. 23.

(24) 2.2.3. Count rate In SPC detectors, the single pixel area is divided between analog and digital part, as presented. in Fig. 2.7. The analog part is responsible for amplifying and shaping the signal generated when the photon hits the sensor material. The width of shaped in such a way pulse influences a so-called dead time. The dead time defines the count rate performance of the detector and it depends on the speed of front-end electronics and influences the maximal number of photon hits which can be registered in a second. In the systems devoted to work with high photon flux the high count rate is desirable and currently, only the UFXC and Pilatus detectors achieved more than 1 Mcps (counts per second) per pixel. In the Pilatus detector, 10 Mcps count rate is achieved by using retrigger capability circuit that allows to almost instantly re-arm the chip for another pulse after the previous one. In the UFXC, the speed of 2.5 Mcps is possible by shortening pulse processing time by the front-end electronics.. Fig. 2.7 Signal (blue line) processing in single pixel readout channel in the typical SPC detector. CSA, Shap, and Comp are respectively Charge Sensitive Amplifier, Shaper and Comparator. 2.2.4. Dynamic range The information about the number of hits recognized by the discriminator is stored inside the. pixel counters. The depth of the counter refers to a so-called dynamic range and describes the maximal number of counts to be stored during single image acquisition. The highest single counter dynamic range among the presented solutions has the Pilatus detector, characterized with 20 bits counter depth. The other detectors possess either single counter of smaller dynamic range (EIGER, XPAD) or two counters. In the Medipix and UFXC detectors, every discriminator has its own individual counter. This solution allows for different operation modes of the chip, such as standard mode in which there are two independent counters of shorter depth or high dynamic range mode in which two counters are connected to create a single counter of bigger depth. In this way, in Medipix and UFXC, it is possible to configure respectively 24 and 28-bit pixel counter depths. 2.2.5. Frame rate The last, but probably the most important parameter for the time-resolved experiments is the. frame rate of the detection system. The frame rate is mostly determined by the time of the detector data readout phase, during which information stored in counters is shifted outside the chip to the external memory. During this phase, the detector is blind to the incoming photons and next frame. 24.

(25) acquisition is suspended. Such a solution is implemented in Pilatus and XPAD detectors for which reported frame rates are no more than 500 fps. To solve the problem, one of the solutions is to implement an internal memory inside each pixel to temporarily store the data for readout phase and not block the x-ray detection path at the same time. This solution is usually implemented by placing two counters inside each pixel and acquiring data into one of them while the other one is being read out. When counting and reading operations are performed alternately in both counters, no blind phase is introduced and data is acquired continuously. The continuous mode of operation can be configured both in the Medipix and UFXC detectors. The maximum reported value of frame rate reported in Medipix equals 100 fps, and 70 000 fps for UFXC. Also, continuous mode is implemented in the EIGER detector, which benefits from additional readout buffer to which the state of the counter is transferred after frame acquisition. This way, 23 000 fps frame rate is achieved. The second solution implemented in modern SPC detectors that allows accelerating the frame rate is a burst mode. In the burst mode, several frames are stored in internal pixel memory before the readout phase. In this way, 1 000 fps for 1 200 frames is reported in the latest version of the Medipix detector. For the UFXC, 1 200 000 fps for 14 consecutive frames is achieved. The burst mode for UFXC is one of the scopes of this work and is more extensively described further. 2.2.6. Summary Information presented in this chapter are the best results achieved by the detectors. All the. main parameters are listed in Table 1 and Table 2 together with references. Table 1 Single photon counting detectors readout ASICs design features Chip. Pilatus3. EIGER. Medipix3RX. XPAD3S. UFXC32k. [34]. [35]–[37]. [19], [38]–[40]. [41]. [30], [42]. 250 nm. 250 nm. 130 nm. 250 nm. 130 nm. 10.5 x 17.5. 19.3 x 20. 15.9 x 14.1. 10.4 x 17.4. 9.6 x 20.1. Pixel size [µm ]. 172 x 172. 75 x 75. 55 x 55. 130 x 130. 75 x 75. Number of pixels. 60 x 97. 256 x 256. 256 x 256. 80 x 120. 128 x 256. Multiple thresholds Counters per pixel Frames rate [fps]. No. No. Yes – up to eight. No. Yes - two. 1 x 20 bit 500. 1 x 12 bit 23 000. 2 x 12 bit 100 in continuous. 1 x 12 bit 500. 2 x 14 bit 70 000 in continuous mode, 1 200 000 in burst mode [44]. Process Chip area [mm2] 2. mode, 1000 in burst mode [40], [43]. 25.

(26) Table 2 Single photon counting detectors readout ASICs electrical parameters Chip. Pilatus3. EIGER. Medipix3RX. XPAD3S. UFXC32k. [34]. [35]–[37]. [19], [38]–. [41]. [30], [42]. [40] PWR/pix. [µW] Noise min. [e− rms] Peaking time [ns]. 15* -. 8.8 110 31. 9 72 110. 40 130 500. 26 123 40. Offset spread [e− rms]. -. 20. 40. 57. 8.5. Dead time [ns] Minimal energy threshold [keV]. 67 2. 400** 5**. 4. 232/101/85 3.5. Count rate [Mcps/pix]. 10. 510/170/128 4.5 (2.5 in Very Low Noise Mode – under tests) 1. -. 1. 2.5 (theoretical 5). * static PWR consumption **minimal reported value. The description of currently available single-photon counting devices clearly shows the UFXC32k IC is a perfect candidate to be used for high demanding time-resolved experiments at synchrotron light sources due to its small pixel size, very short dead-time, and high available frame rate. It is also very important that the UFXC32k hybrid pixel detector readout chip was designed at AGH-UST and therefore it is easily accessible, while usage of Medipix detector requires very costly collaboration involvement and also EIGER or Pilatus chips are off limits as they are the commercial property of Dectris. From the above reasons, the UFXC32k hybrid pixel detector readout chip was chosen to be used for the development of high-speed systems for synchrotron applications.. 26.

(27) 3. DISSERTATION THESES As described in the introduction, synchrotron radiation is unique as large number of highly coherent photons is generated in very short and frequent bunches. Therefore single photon counting hybrid pixel detectors are still considered to be too slow for high demanding time-resolved applications, requiring tens of thousands frames per second and a very short signal integration time together with dead-time of the front-end electronics in the range of 100 ns or less. However, new designs of hybrid pixel detector readout integrated circuits allow operation with higher speeds and brings the possibility to use them in those high demanding time-resolved applications with synchrotron radiation. Therefore, the following theses are formed: A. A single-photon counting hybrid pixel detectors are suitable for operation in a pump-probeprobe-kind experiment, when a short integration time allowing single bunch separation together with high energy resolution, low spread of gain and DC offsets and sufficient noise performance are kept with synchrotron radiation. B. A single-photon counting hybrid pixel detector with very high frame-rate and short deadtime of the front-end electronics allows to greatly increase time resolution and the measured contrast for multi-speckle X-ray photon correlation spectroscopy, C. The use of universal, visual programming platform in the design of an embedded and a lowcost hybrid pixel detector readout system allows to unify design process, to reduce complexity of design and to reduce the number of software tools.. 27.

(28) 28.

(29) 4. UFXC32K HYBRID PIXEL DETECTOR 4.1 Description The UFXC32k IC [30] was designed at AGH-UST and its full name is Ultra-Fast X-Ray Chip. The ASIC is a single photon counting hybrid pixel detector readout circuit designed in 130 nm CMOS process. The chip was designed to work with high photon flux and is intended for X-ray imaging and material science including synchrotron applications. The photo of the chip is presented in Fig. 4.1 (a). The area of the chip is 9.64 mm × 20.15 mm and it contains 128 × 256 square shaped pixels with a side equal to 75 µm. The total number of pixels (readout channels) is 32 768. The chip benefits from the advantages of single photon counting technique, such as wide dynamic range, the absence of readout noise and ability to differentiate photon by its energy. As the scope of this work are detectors for X-ray experiments using the energy in the range of 3.5 keV - 14 keV, the UFXC32k IC detection modules used and described are bump-bonded to 320 µm silicon sensor. The reason for this is that the silicon sensor is suitable for material science as it characterizes with high absorption for small energies (up to 100% absorption of X-ray for 8 keV energy). In order to make the reading of this dissertation simpler, this hybrid pixel detector built with the UFXC32k IC and a silicon sensor will be referred to as UFXC detector from now on.. (a) (b) Fig. 4.1 a) Photo of UFXC32k chip bump-bonded to silicon sensor and placed on the PCB [30], b) Block diagram of a UFXC32k chip. 4.1.1. Chip control blocks As shown in Fig. 4.1 (b), the ASIC consists of the matrix of pixels, control blocks, and pads. located at the bottom of the matrix, which are used for power supply and data transmission. The chip 29.

(30) is controlled through the 128-bit peripheral shift register, single LVDS data input line, and 5 LVDS control lines. The shift register is used to receive chip configuration and is fed by the data input line, namely signal_in. When the configuration data is shifted to the register, the content is rewritten to the configuration register and new settings are applied for operation. The configuration register contains both analog blocks biasing settings (e.g. charge-sensitive amplifier bias current (CAS) or effective feedback resistance built with the use of Krummenacher circuit (Krum) or a threshold level) and digital operation configuration (e.g. counters operation configuration, counters depth) of the ASIC. One of the configuration registers’ bits is responsible for gate control (Fig. 4.2). The gate control bit allows counters to count pulses coming from discriminators outputs and is usually implemented as the external signal line [34], [45]. Aside from signal_in line, five more LVDS control lines (clk, shift, write_ctrl, pclk, and strobe) are responsible for the chip operation. These lines are used to set the configuration to each pixel and to readout the data from pixels. The chip is designed to work with clock frequency up to 400 MHz. In order to quickly shift the data out from the ASIC, 8 signal_out LVDS lines are provided. 4.1.2. Single pixel architecture UFXC32k IC single pixel architecture is presented in Fig. 4.2. The ASIC consists of . charge-sensitive amplifier with control of an effective resistance in the feedback (Krum), as well as a single bit (bgcsa) controlling the feedback capacitance, allowing to set high or low gain of the charge amplifier,. . AC-coupling block with 4-bit control of the capacitance allowing for precise gain trimming,. . shaper with control of an effective resistance in the feedback (Rfsh),. . a DC level trimming circuits allowing adjustment of the DC levels at the discriminator’s input among the whole pixel matrix; this block is very important as the discrimination levels are set globally for all pixels,. . 2 independent discriminators followed by two configurable counters allowing different configuration.. In UFXC32k IC, two discriminators (called Low and High) are implemented in every pixel and they are followed by two independent and configurable 14-bit long counters. In addition, the operation of those two counters can be configured by the main configuration register and following operation modes can be chosen: -. Standard mode – each counter is fed by the separate discriminator. Counters depth equals 14 bits.. 30.

(31) -. Long Counter mode – single discriminator only is used and hits are counted in one 28-bits counter built up by two counters linked together serially.. -. Zero Dead-Time mode - single discriminator feeds two counters alternately. When first counter counts photons, the second one is read out and then the role is switched. This mode allows for continuous data acquisition. During the data readout, certain group of counters (L or H) forms a shift register. The counters. content is moved to the 128-bit peripheral shift register and then output to 8 signal_out lines.. Fig. 4.2 UFXC32k IC single pixel architecture When a photon is absorbed the detector, the electron-hole pairs are generated in the sensor material. The number of pairs generated is proportional to the energy of the incident photons. Assuming the sensor material is silicon which requires 3.67 eV to generate single electron-hole pair, about 2 180 e-h pairs are generated by a single photon having the energy of 8 keV (Cu). This charge cloud of 2 180 holes is driven by the applied electric field toward collection electrodes which are connected to individual pixels of the ASIC. Such a charge cloud drifting in a very short time (order of tens of ns) is a short current pulse and it is an input signal of the Charge Sensitive Amplifier (CSA), which amplifies this current pulse and integrates it on the feedback capacitance. The capacitance is further discharged by the feedback resistance. In UFXC32k IC, the feedback loop of CSA consists of two capacitors and Krummenacher feedback circuit [46]. The two capacitors are used as a first stage gain regulation and allow modifying pulse gain depending on the energy of the incident photons and the Krummenacher feedback allows to discharge the capacitance and in the same time it works with the detector leakage current. The voltage step produced by the CSA stage is the input of the shaper stage, which further optimize the signal to noise ratio and prepare the signal for the discriminator 31.

(32) stage. One important characteristic of the UFXC32k IC is the globally set discriminator voltage common for all the channels. This solution requires very high uniformity of pulses at the discriminator input so that every channel gives similar response to the photon of the same amplitude. However, due to process imperfections, the gain spread together with the DC offset spread at the input of the discriminator are introduced, as shown in Fig. 4.3. To make equalization of threshold level dispersion and gain spread a trimming capabilities are implemented in each readout channel. To tune the gain the trimming circuit is implemented at the input of the shaper. The value of the gain in individual pixels is determined by the ratio of Cc+Ccx capacitance to the Csf capacitance in the feedback loop of the shaper. The value of Ccx capacitance depends on four gain bits, namely bg<3:0>, in the configuration register and is set digitally. Apart from the gain, also a DC offset spread is tuned in the UFXC32k IC. The influence of the offset spread on the chip counting ability is presented in Fig. 4.3 (b). The offset trimming circuit is located in front of each discriminator and contains 7-bit trimDAC. Additionally, 4 other trimming bits are reserved for more precise trimming and these bits are described more extensively in [47]. Having both trimming circuits implemented in the chip it is possible to set the single global threshold level for all pixels in the matrix.. (a) (b) Fig. 4.3 a) Simulated exemplary pulses with different gain at the input of the discriminator b) Simulated exemplary pulses with different DC offset levels at the input of the discriminator. 4.2 Threshold Scan Keeping in mind the single pixel schematic from Fig. 4.2 one can see it is not possible to directly measure basic parameters of the IC, like the pulse noise after the shaper stage or the channel gain or threshold level dispersion among pixel matrix. As only the digital representation of the discriminated shaper output is available, for the basic parameters estimation a so-called threshold scan is performed. The threshold scan represents the number of counts acquired during the certain period of time as a function of threshold level. Assuming monoenergetic radiation and low photon flux, Fig. 4.4 32.

(33) shows the relation between the energy discrimination level and photon counts for a single pixel. When the threshold is set below the offset of the pulse or above its maximum amplitude, no pulses are counted. When the threshold is equal to the offset level, a comparator is constantly switched by the noise and the number of counts is high. Having the threshold set above the level of the noise, switches are induced only by pulses generated by photon hits and thus the number of counts equals the number of incoming photons. When the threshold voltage level is close to the pulse amplitude, the number of counts decreases with additional noise influence.. Fig. 4.4 Illustration of pulses generated by monoenergetic radiation (left graph) and integral spectra of hit counts as a function of the level of energy discrimination, so-called threshold scan (right graph) An ideal characteristic of monochromatic radiation registered by the detector can be presented as an impulse step. However, the final shape of the characteristic is influenced by other factors, such as front-end electronic noise and, especially in small-sized pixels, the charge sharing effect, as presented in Fig. 4.5 (a). (a). (b) Fig. 4.5 a) Example of threshold scans: I. without noise, II. with noise, III. with noise and charge sharing effect b) Illustration of charge sharing effect in the hybrid pixel detector The charge sharing [48], illustrated in Fig. 4.5 (b), occurs in a pixelated detector when the charge generated inside a detector active volume is collected by more than one readout channel. It usually happens when a photon hits sensor surface close to the border of a pixel. In the sensor. 33.

(34) material, incident photon generates the cloud of charge that is driven by the electric field to the electrodes of the pixels. However, the area covered by the cloud expands while traveling, which can be assigned to Coulomb repulsion and diffusion [49], and the charge may be split between the electrodes. This causes a smaller charge at the input of the readout channel resulting in smaller detected energy. In practical applications, pixels smaller than 100 um2 are significantly affected by this effect and it must be taken into consideration during the estimation of basic parameters. Due to the charge sharing effect, in the case of monoenergetic radiation usually the s-curve measured with a threshold scan procedure is affected with additional coefficient responsible for dependence on a number of registered hits on the threshold set [49], [50]. Setting the threshold exactly to the half of the measured energy allows registering a proper number of hits. The following formula (4.1) is applied to extract information from threshold scan characteristic:. (4.1). The main expression argument is energy threshold - x. The expression consists of three terms: error function (Erf) formula, the magnitude (p0) determined by the exposure time and source flux, together with charge sharing effect factor (p1), and the radiation background factor (p2 and p3). The scurve is modeled with an error function with inflection point expressed as µ and σ as Gaussian distribution spread of the slope. The p0 parameter describes the exposure time and the flux of the source, and p1 is a linear factor that refers to the charge sharing effect. The background such as pileups or the energy which was not removed properly by the monochromator is modeled with p2 parameter and p3 factor. Fig. 4.6 (a) presents an exemplary measurement of an integral spectrum (the. (a) (b) Fig. 4.6 a) Example of a threshold scan for single pixel measured with monochromatic radiation. Y scale is logarithmic and X axis is expressed in the units of threshold DAC LSB. b) Zoom in to the counts generated by the radiation and a fit to the data. 34.

(35) result of a threshold scan procedure) for a single pixel. More detailed view of the counts generated by the radiation is presented in Fig. 4.6 (b) and shows an inclination caused by the charge sharing effect. The red plot presents the s-curve fit modeled with (4.1) formula and it faithfully overlaps the data. 4.2.1. Iterative Offset Correction Algorithm Inside the UFXC32k IC, there is a sophisticated multilevel offset correction circuit [47] which. allows trimming the threshold level dispersion to the value of about 1.5 mV, what calculated to the input is less than 10 el. rms. Additionally, the gain correction capability allows keeping the gain spread lower than 3%. The fast trimming procedures presented in [51] well and are usable on standard PCs systems as they require a certain amount of memory to keep all the measured data for calculations. In order to allow the embedded devices to perform the trimming procedure, the iterative algorithms utilizing a minimal amount of memory had to be proposed. An additional motivation was the correction time. Even though the previously developed algorithms are very fast, the time is still significant for fast re-correction or when the number of trimming bits is large. To change the DC level at the input of the discriminator, a 7-bits offset trimming register is used. Fig. 4.7 presents DC levels at the input of discriminator for every pixel in the matrix as a function of the trimDAC value. To obtain these results for 32768 pixels a threshold scan was measured for every trimDAC value. Then, for each pixel, an estimation of DC offset level was calculated from the integral spectrum for each trimDAC value. The results show that the DC offset level of the noise decreases with increasing value of trimDAC. As the plot show, it is possible to find the trimDACs value for each pixel making the DC offset level uniform only if the DC offset level will be in a range from 0 to ~220 DAC LSB as the DC level at the discriminator input cannot be moved above 220 DAC LSB for every pixel.. Fig. 4.7 DC offset levels for all pixels in the matrix as a function of trimDAC settings. 35.

(36) Standard trimming procedure presented in [51] assumes the measurement of those characteristics and then finding the trimDAC value for certain threshold level. Another option for a faster trimming procedure is to choose the certain value of the threshold, e.g. 100 DAC LSB, and then, for this certain threshold do the trimDAC scan. Having this trimDAC scan it is easy to choose for every pixel a trimDAC value (pixel returns the largest amount of counts). With this method, as shown in [47] it is possible to obtain very good results in a relatively short time. One drawback of the method is it requires a relatively large amount of memory to keep the measurement for all trimDAC values and so it is more difficult for implementation in an embedded device equipped with a smaller amount of memory.. Fig. 4.8 Illustration of the distribution of counts registered by the discriminator at different threshold levels when the noise only is collected The offset trimming method which the Author proposes in this dissertation accelerates correction procedure about 9 times and maintains a high quality of the correction together with the limitation of the memory usage. The method allows trimming offsets to the threshold level determined by the user and consists of two main stages.. In the first stage, the value of trimDAC changes according to the successive approximation algorithm and the number of counts registered at the indicated level, called thdet, is verified. The method makes use of the fact that the comparator keeps low state when the noise lies below the thdet and high state when the noise lies much above, as it is presented in Fig. 4.8. As a result, the number of counts registered in the counter is equal to zero and one respectively. When the noise is located close to the thdet, the comparator is switched over multiple times and the number of counts increases. Knowing the location (left or right) of the DC level (noise peak) toward thdet, the value of trimDAC is changed to locate the DC level maximally close to the determined threshold level. In the method, at first the value of the trimDAC is set in the middle of its range (64) and the number of counts at thdet is verified (see Fig. 4.9). If the number of counts indicates that the DC level in the pixel 36.

(37) is located above thdet, the value of trimDAC is decreased. If the DC level lies below thdet, the value of trimDAC is increased. Then, the number of counts is checked again. The operations are repeated until the number of counts is greater than one and thus indicates that the DC level is located close to thdet. To change the value of trimDAC, the successive approximation algorithm is used. Every consecutive time the value of trimDAC is changed, the step is reduced twice following (4.2) formula: 𝑎0 = 0 𝑎𝑛+1 = 𝑎𝑛 ±. 128 2𝑛+1. ;𝑛 ≥ 0. (4.2). As a result, the initial value of trimDAC equals 64, and then changes by ± 32, ±,16, ± 8 and so on. Fig. 4.9 illustrates the trimming procedure for a single pixel with the use of the successive approximation algorithm. A red arrow indicates thdet and the position of Gauss shows how the change of trimDAC affects the DC level. In the example, three steps are sufficient to find the value of trimDAC that allows locating the DC level in the proximity of thdet, however, in the practical application, it takes between 2 to 4 repetitions to find the optimal value.. Fig. 4.9 Illustration of the noise level during trimming procedure with the use of a successive approximation algorithm As the trimDAC characteristics are not monotonic (see Fig. 4.7), in the second step the close neighborhood of indicated trimDAC value is verified. The neighborhood consists of 5 trimDAC values on both sides, as shown in Fig. 4.10. The value of trimDAC that corresponds to the highest number of counts is acknowledged to be the best match.. 37.

(38) Fig. 4.10 Illustration of the noise offsets modified by the value of trimDAC Fig. 4.11 presents measured noise levels in pixels before and after the trimming procedure. The result shows proper work of the trimming method. With the use of successive approximation algorithm and neighborhood scan, verification of only up to 14 values of trimDAC was necessary to trim offset levels below 1 DAC LSB spread in the pixels in the matrix.. Fig. 4.11 Measured DC offset levels in the matrix before (black) and after (red) offset trimming procedure It is worth to mention, that during the whole procedure no measurement data (except the latest one) needs to be kept in the memory. Only current trimDAC values need to be remembered as they are recalculated with every iteration (measurement). 4.2.2. Fast Gain Correction Algorithm To assure a proper number of counts not sensitive to the charge sharing effect, the. discrimination level needs to be set exactly at 50% of the photon energy [52]. The dependence. 38.

(39) between the allocation of a hit to the pixel and hit position is more extensively described in [53] and [54]. Due to imperfections of the process, the gain spreads among the pixel matrix making it impossible to set a common threshold for all pixels to be exactly at half of the energy level. The trimming capability is implemented inside each pixel maximizing the gain immunity in the pixel matrix. The UFXC32k IC trimming circuit allows for 16 different amplifications of the pulse. The procedure that allows evaluating the dependence of the gain setting (bit bg on fig. 3.2) to the actual gain is threshold scan. However, performing the threshold scan is a time-consuming process and can take hours for low radiation intensities which are very common when a high uniformity of the radiation intensity is required. Even at synchrotron light sources when the radiation is obtained as a reflection from the secondary target. To diminish the time needed for trimming procedure, an algorithm might be used that benefits from the measured gain range and resolution. Fig. 4.12 (a) presents threshold scans of monoenergetic radiation collected at successive values of bg Fig. 4.2 and the results demonstrate the gain linearity.. (a). (b) Fig. 4.12 a) Pixel gain for different bg settings. b) The linearity of gain trimDAC. The red line is a linear fit to the mean energy peaks at given gain trimDAC values. Even though the gain dependence is not linear, the resolution of the bg determined by a single bit is large enough to allow assuming the linearity of the gain and benefit from this assumption. Therefore the Author made this assumption and proposed the method for gain correction which assumes measurement of only a few configurations allowing estimation of the desired bg setting. To do so, the gain at the chosen bg value is measured and the linear regression is calculated. Fig. 4.12 (b) presents the linear fit to the gains calculated at bg = {3, 6, 9}. The designated a and b parameters of the linear function can be used to estimate the pulse amplification at other bg values.. 39.

(40) (a) (b) Fig. 4.13 a) Threshold scan after trimming procedure b) Measured energy peak positions before and after trimming The presented method was used to trim the gain so the energy peak would be located in 200 DAC LSB. The threshold scan after the correction is presented in Fig. 4.13 (a) and proves proper operation of the method. Fig. 4.13 (b) shows the distribution of energy peaks in pixels before and after the trimming procedure. The standard deviation of the peak position was 7.95 DAC LSB before the trimming and 2.70 DAC LSB after, which is comparable to 2.53 DAC LSB when the full gain trimDAC scan is performed. The results are gathered in Table 4-1. Table 4-1 Trimming results for pixels in the matrix at the input of the Low discriminator Time [min]. Mean [DAC LSB]. Standard deviation [DAC LSB]. Not trimmed (bg = 7). 0. 196.73. 7.95. Long trimming. 30 – 90 *. 199.80. 2.53. Fast trimming. 8 – 20 *. 200.36. 2.70. *Depending on the radiation intensity. 4.3 Summary The paragraph presents the UFXC32k hybrid pixel detector readout integrated circuit and its main features. It works in the single photon counting mode and having only 75 µm x 75 µm pixel pitch and very short dead-time of analog front-end it is suitable for experiments using synchrotron radiation. Due to certain limitations on the time during the experiment as well the possibility of using an embedded control system for the readout new methods for DC offset spread trimming and for the gain trimming were developed by the Author and described in details. Not only the DC offset spread trimming algorithm is faster than the previous ones, but it also requires a smaller amount of memory and is suitable for embedded devices. Concerning the gain trimming, it is about 4 times faster than the procedures used before.. 40.

(41) 5. PUMP-PROBE-PROBE DETECTOR 5.1 Pump-Probe-Probe Experiment Introduction A Pump-Probe (PxP) experiment is a time-resolved type of experiment that allows studying the dynamic processes in materials in a time domain. In the PxP experiment, a photolysis or laser light is used to induce dynamic changes in the crystal lattice. Fig. 5.1 presents the behavior of an exemplary atomic structure in time after laser pulse excitation. In order to visualize a chronology of the events during sample relaxation a sequence of diffraction patterns is collected at different time delays with respect to the laser inducing moment.. Fig. 5.1 Exemplary atomic structure shrinks and expands at successive delays after excitation by a laser pulse Two factors are very important in PxP experiments, namely the high intensity of an X-ray pulse to produce statistically significant information and the time resolution of a single image. Therefore, the X-ray pulse that best suits experiment needs is generated by the synchrotron facility. The Synchrotron SOLEIL works in three different operation modes and each of them generates bunches of photons in different time configurations. The detection system must be able to perform the experiment regardless of the mode used (Fig. 5.2). In a hybrid filling mode, the X-ray is generated continuously during three quarters of the ring. In the middle of a fourth quarter, a single bunch is isolated from both sides and the silent intervals are 147,64 ns long. As the hybrid mode is most demanding due to the continuous radiation during 3 quarters of the whole ring, the experimental system should be prepared and tested for the hybrid mode. Fig. 5.3 illustrates the setup of PxP experiment. In the experiment, the image acquisition is triggered shortly after the excitation by an ultra-short laser pulse (pump), which equals ~40 fs width at SOLEIL. In order to acquire the diffraction pattern, a single monochromatic pulse of X-ray (probe) is sent and 2D X-ray detector collects the image.. 41.

(42) Fig. 5.2 Filling modes of synchrotron ring at SOLEIL Synchrotron. Fig. 5.3 Pump-Probe experimental setup During the whole scan, the delay between the laser pulse and image acquisition changes, as shown in Fig. 5.4. This time delay scan allows registering the state of crystal lattice at different moments. Repeating the acquisition multiple times at every delay step allows acquiring statistically enough amount of data to assure experiment reliability.. Fig. 5.4 Increasing delay between the laser pulse and diffraction image acquisition at consecutive delay steps in PxP experiment A Pump-Probe-Probe (Px2P) experiment is an extension to Pump-Probe experiment. It is planned to be performed at SOLEIL synchrotron facility, France, at undulator-based CRISTAL beamline [45], [55]. In Px2P one more probe (when compared to PxP) is collected before every sample excitation, as shown in Fig. 5.5. The additional probe is triggered at a constant delay after sample relaxation, and is used to register background radiation or any drifts in experimental conditions. 42.

(43) Fig. 5.5 Pump-Probe-Probe schema The detector to be used in the Px2P experiment at CRISTAL beamline must fulfill the following requirements. First and foremost, it must be able to separate photons from single bunch what requires the gate time to be less than ~150 ns. This separation of a single bunch of photons induces also the requirement for the detector’s front-end dead time, which should allow recovering from any saturation before the designated bunch of photons arrives. The ability to detect pile-ups is also desired. Furthermore, the detector must be able to acquire two images: before the sample excitation by the laser and after. Having in mind 1 kHz laser repetition rate at the beamline, which is going to be increased to 5 kHz in the near future, the desired frame rate of 10 kHz should be possible to be achieved by the detection system. Moreover, to speed up the overall acquisition time, the detector should be able to collect a high amount of data in a short amount of time and store the data in a memory. In addition to the detector speed requirements, another beamline demand is the possibility to work with low energy photons of 7 keV, what places an emphasis on the low noise of the sensor readout ASIC and high uniformity of all readout channels when a single global threshold value is set in the system. As UFXC32k chip fulfills all the experiment requirements, the software system for single module board was designed and its performance was verified.. 5.2 Detection System 5.2.1. Hardware layers Due to the limited time of the experiment (only 3 days of the beam time), a robust system was. used to perform the experiment. In the single chip module, the UFXC32k IC is bump-bonded to the 320 µm thick silicon sensor and then this hybrid pixel detector is wire-bonded to the PCB [56]. The sensor is supplied by 135 V bias voltage from external power supply. For the detector control, NI PXI platform is used. The NI PXI platform is an industry standard platform for control and measurement systems consisting of a controller and a set of modular instruments [57]. The setup used during the measurements consists of NI PXIe 8135 controller module working under MS Windows operating system and an NI 7962R Kintex-7 FPGA card with NI 6589 adapter module to handle the UFXC32k 43.

(44) IC communication interface (high speed digital input-output signals in LVDS standard). All programs for the data acquisition in FPGA, data processing and system control in MS Windows OS are designed and written in LabVIEW by the Author. Fig. 5.6 shows a single chip module (a) and experimental setup (b) prepared by the Author.. X-ray tube beam. Detector board. Controller platform platform. (a). (b) Fig. 5.6 a) Single chip module b) Acquisition system setup – X-ray tube, single chip module and controller platform Fig. 5.7 shows communication mechanisms as well as the distribution of tasks between individual parts of the system proposed by the Author. The external digital trigger controls the start of the acquisition. To enable testing of the system, trigger delay functionality is implemented in the FPGA, which allows shifting the delay of the test trigger. The test trigger itself is generated in the external generator device to ensure proper delays present in the experiment. After starting the acquisition, the program working on FPGA target collects and processes the data. The processed data is sent to PCs’ RAM in a form of compressed packets. The transfer is handled by eight parallel DMA FIFOs that allows high reliability and the transmission throughput of 800 Mbps. Simultaneously to the acquisition, an application working under Windows OS reads the data out from RAM, processes it and saves to disk for further analysis. The signal that simulates laser pulse trigger is generated by an external generator and it is controlled by the host application.. 44.

(45) Fig. 5.7 Detection system schematic proposed by the Author. 5.2.2. Software design. Due to single photon bunch separation requirement in the Px2P experiment, the Author proposed and implemented in the FPGA program a short-gate mode as an extension to standard detector operation mode (described in the chapter “Single pixel architecture”). In both standard and short-gate modes, both counters are configured to work in parallel are fed with signals from independent discriminators operating with separate threshold voltage levels, what allows selection of the photons from the given energy window. Furthermore, assuming monochromatic radiation, a pile-up detection is possible. Assuming that the dead-time of the front-end is shorter than the bunch separation time, what is true in the case of UFXC detector, only the double-hit at the same time in the same pixel is the situation to detect. If two photons hit the detector in the same time, the total charge is twice bigger and so setting one threshold to the half of the energy and the second one to one and a half of the energy (assuming linear operation of the charge amplifier) allows registering the pile-up event. To decrease the amount of data to be output from the chip, the counters depth is limited to 2 bits. The reason is that the single bunch cannot give more than a single event plus a pile-up event (with two discriminators we cannot detect how many events contribute to the pile-up, but the probability of three events in one pixel from a single bunch is very low [44]. The main goal of the system is to acquire data within less than 150 ns. Usually, the time during which pixels count X-ray is defined by an external digital signal that acts as a shutter control [58], [59]. Then, the time of an observation depends on digital control system only. However, as shown in Chapter 2, the dead time of the front-end of other solutions is too high to recover from saturation caused by continuous radiation of hybrid mode of synchrotron in just 150 ns. In UFXC32k chip, there. 45.