MC74VHC1G09-2

2-Input AND Gate with Open Drain Output

The MC74VHC1G09 is an advanced high speed CMOS 2−input AND gate with open drain output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including an open drain output which provides the capability to set output switching level.

This allows the MC74VHC1G09 to be used to interface 5 V circuits to circuits of any voltage between V

_CC

and 7 V using an external resistor and power supply.

The MC74VHC1G09 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.

Features

• High Speed: t

_PD

= 4.3 ns (Typ) at V

_CC

= 5 V

• Low Internal Power Dissipation: I

_CC

= 1 mA (Max) at T

A

= 25 °C

• Power Down Protection Provided on Inputs

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FETs = 62; Equivalent Gates = 16

• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

V_CC IN B

IN A

OUT Y GND

IN A

IN B & OUT Y

OVT

Figure 1. Pinout (Top View)

Figure 2. Logic Symbol 1

2

3 4

5

http://onsemi.com

MARKING DIAGRAMS

See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.

ORDERING INFORMATION VX = Device Code M = Date Code*

G = Pb−Free Package SC−88A / SOT−353 / SC−70

DF SUFFIX CASE 419A

TSOP−5 / SOT−23 / SC−59 DT SUFFIX

CASE 483

VX M G G

L L H H

L H L H

FUNCTION TABLE

Inputs Output

A B

L L L Z Y PIN ASSIGNMENT 1

2

3 GND

IN B IN A

4

5 VCC

OUT Y 1 5

VX M G G

M

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary depending upon manufacturing location.

MAXIMUM RATINGS

Symbol Characteristics Value Unit

V_CC DC Supply Voltage −0.5 to +7.0 V

V_IN DC Input Voltage −0.5 to +7.0 V

V_OUT DC Output Voltage −0.5 to 7.0 V

I_IK Input Diode Current −20 mA

I_OK Output Diode Current +20 mA

I_OUT DC Output Current, per Pin +25 mA

I_CC DC Supply Current, V_CC and GND +50 mA

P_D Power dissipation in still air SC−88A, TSOP−5 200 mW

qJA Thermal resistance SC−88A, TSOP−5 333 °C/W

T_L Lead temperature, 1 mm from case for 10 s 260 °C

TJ Junction temperature under bias +150 °C

Tstg Storage temperature −65 to +150 °C

MSL Moisture Sensitivity Level 1

F_R Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in

V_ESD ESD Withstand Voltage Human Body Model (Note 1)

Machine Model (Note 2) Charged Device Model (Note 3)

> 2000

> 200 N/A

V

I_Latchup Latchup Performance Above V_CC and Below GND at 125°C (Note 4) ±500 mA

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Tested to EIA/JESD22−A114−A 2. Tested to EIA/JESD22−A115−A 3. Tested to JESD22−C101−A 4. Tested to EIA/JESD78

RECOMMENDED OPERATING CONDITIONS

Symbol Characteristics Min Max Unit

V_CC DC Supply Voltage 2.0 5.5 V

V_IN DC Input Voltage 0.0 5.5 V

V_OUT DC Output Voltage 0.0 7.0 V

T_A Operating Temperature Range −55 +125 °C

t_r, t_f Input Rise and Fall Time V_CC = 3.3 V ± 0.3 V

V_CC = 5.0 V ± 0.5 V 0

0 100

20 ns/V

Device Junction Temperature versus Time to 0.1% Bond Failures

Junction

DC ELECTRICAL CHARACTERISTICS

Symbol Parameter Test Conditions

V_CC (V)

T_A = 25°C T_A ≤ 85°C −55 ≤ TA ≤ 125°C Min Typ Max Min Max Min Max Unit VIH Minimum High−Level

Input Voltage 2.0

3.04.5 5.5

1.52.1 3.153.85

1.52.1 3.153.85

1.52.1 3.153.85

V

V_IL Maximum Low−Level

Input Voltage 2.0

3.04.5 5.5

0.50.9 1.351.65

0.50.9 1.351.65

0.50.9 1.351.65

V

VOL Maximum Low−Level Output Voltage V_IN = V_IH or V_IL

V_IN = V_IH or V_IL

IOL = 50 mA 2.0 3.04.5

0.00.0 0.0

0.10.1 0.1

0.10.1 0.1

0.10.1 0.1

V

VIN = VIH or VIL

I_OL = 4 mA

I_OL = 8 mA 3.0

4.5 0.36

0.36 0.44

0.44 0.52

0.52 V

I_IN Maximum Input

Leakage Current V_IN = 5.5 V or GND 0 to

5.5 ±0.1 ±1.0 ±1.0 mA

ICC Maximum Quiescent

Supply Current VIN = VCC or GND 5.5 1.0 20 40 mA

I_OFF Power Off−Output

Leakage Current V_OUT = 5.5 V

V_IN = 5.5 V 0 0.25 2.5 5 mA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

AC ELECTRICAL CHARACTERISTICS C_load = 50 pF, Input t_r = t_f = 3.0 ns

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

Test Conditions

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

T_A = 25°C ^ÎÎÎÎÎ

ÎÎÎÎÎ

T_A ≤ 85°C ^ÎÎÎÎÎ

ÎÎÎÎÎ

−55 ≤ TA ≤ 125°C^ÎÎÎ

ÎÎÎ

ÎÎÎ

Unit

ÎÎÎ

ÎÎÎ

Min

ÎÎÎ

ÎÎÎ

Typ

ÎÎÎ

ÎÎÎ

Max

ÎÎÎ

ÎÎÎ

Min

ÎÎÎ

ÎÎÎ

Max

ÎÎÎ

ÎÎÎ

Min

ÎÎÎ

ÎÎÎ

Max

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

t_PZL

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

Maximum Output Enable Time, Input A or B to Y

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

V_CC = 3.3 ± 0.3 V CL = 15 pF RL = RI = 500 W CL = 50 pF

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

6.28.7

ÎÎÎ

ÎÎÎ

ÎÎÎ

12.38.8

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

10.514.0

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

12.516.5

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ns

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

V_CC = 5.0 ± 0.5 V CL = 15 pF R_L = R_I = 500 W CL = 50 pF

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

4.35.8

ÎÎÎ

ÎÎÎ

ÎÎÎ

5.97.9

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

7.09.0

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

11.09.0

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

tPLZ ^{ÎÎÎÎÎÎÎ}

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

Maximum Output

Disable Time ^{ÎÎÎÎÎÎÎÎ}

ÎÎÎÎÎÎÎÎ

V_CC = 3.3 ± 0.3 V CL = 50 pF R_L = R_I = 500 W

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

8.7ÎÎÎ

ÎÎÎ

12.3ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

14.0ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

16.5ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ns

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

V_CC = 5.0 ± 0.5 V CL = 50 pF R_L = R_I = 500 W

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

5.8

ÎÎÎ

ÎÎÎ

ÎÎÎ

7.9

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

9.0

ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

11.0

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

C_IN ^{ÎÎÎÎÎÎÎ}

ÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎ

Maximum Input Ca- pacitance

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

6.0^ÎÎÎ

ÎÎÎ

ÎÎÎ

10 ^ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

10 ^ÎÎÎ

ÎÎÎ

ÎÎÎ ÎÎÎ

ÎÎÎ

ÎÎÎ

10^ÎÎÎ

ÎÎÎ

ÎÎÎ

pF

C_PD Power Dissipation Capacitance (Note 5)

Typical @ 25°C, VCC = 5.0 V 18 pF

5. C_PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no−load dynamic power consumption; P_D = C_PD  VCC2  fin + I_CC  VCC.

RL

V_CC − 7 V

OVT V_CC

A B

50%

50% VCC

t_PZL t_PLZ

V_OL +0.3 V V_CC GND HIGH IMPEDANCE Y

C_L = 50 pF equivalent (Includes jig and probe capacitance) R_L = R₁ = 500 W or equivalent

R_T = Z_OUT of pulse generator (typically 50 W) PULSE

GENERATOR

R_T

DUT V_CC

R_L R₁

C_L

E = (A • B) + (C+D) 2.2 kW

220 W Figure 4. Output Voltage Mismatch Application Figure 5. Switching Waveforms

Figure 6. Test Circuit

Figure 7. Complex Boolean Functions Figure 8. LED Driver Figure 9. GTL Driver VCC x 2

A or B

A B

D C

MC74VHC1G09

V_CC

MC74VHC1G03

B A

V_CC V_CC

R_LED 1

2

3 4

5

A B

3.3 V 1.5 V

GTL MC74VHC1G09

ORDERING INFORMATION

Device Package Shipping^†

MC74VHC1G09DFT1G

PACKAGE DIMENSIONS

SC−88A (SC−70−5/SOT−353) CASE 419A−02

ISSUE L

ǒ

_inches^mm

Ǔ

SCALE 20:1

0.65 0.025

0.65 0.025 0.50

0.0197

0.40 0.0157

0.07481.9

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. 419A−01 OBSOLETE. NEW STANDARD 419A−02.

4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.

DIM A

MIN MAX MIN MAX MILLIMETERS

1.80 2.20 0.071 0.087

INCHES

B 0.045 0.053 1.15 1.35 C 0.031 0.043 0.80 1.10 D 0.004 0.012 0.10 0.30 G 0.026 BSC 0.65 BSC

H --- 0.004 --- 0.10

J 0.004 0.010 0.10 0.25 K 0.004 0.012 0.10 0.30 N 0.008 REF 0.20 REF S 0.079 0.087 2.00 2.20

B 0.2 (0.008) ^{M M}

1 2 3

4 5

A G

S

D 5 PL

H

C

N

J

K

−B−

PACKAGE DIMENSIONS

TSOP−5 CASE 483−02

ISSUE K

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A.

5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION.

TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY.

DIM MIN MAX

MILLIMETERS

A 3.00 BSC

B 1.50 BSC

C 0.90 1.10

D 0.25 0.50

G 0.95 BSC

H 0.01 0.10

J 0.10 0.26

K 0.20 0.60

M 0 10

S 2.50 3.00

1 2 3

5 4

S

A G B

D

H

C J

_ _

0.0280.7 0.0391.0

ǒ

_inches^mm

Ǔ

SCALE 10:1

0.0370.95

2.4 0.094 1.9

0.074

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.20

5X

C A B T

0.10

2X

2X 0.20 T

NOTE 5

C ^SEATING_PLANE 0.05

K

M

DETAIL Z

DETAIL Z

TOP VIEW

SIDE VIEW A

B

END VIEW

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