Description
CD22100 combines a 4 x 4 array of crosspoints (transmis- sion gates) with a 4-line to 16-line decoder and 16 latch circuits. Any one of the sixteen transmission gates (cross- points) can be selected by applying the appropriate four line address. The selected transmission gate can be turned on or off by applying a logic one or zero, respectively, to the data input and strobing the strobe input to a logic one. Any number of the transmission gates can be ON simultaneously.
When the required operating power is applied to the CD22100, the states of the 16 switches are indeterminate.
Therefore, all switches must be turned off by putting the strobe high and data in low, and then addressing all switches in succession.
Features
• Low ON Resistance . . . .75Ω(Typ) at VDD= 12V
• “Built-In” Control Latches
• Large Analog Signal Capability. . . ±VDD/2
• 10MHz Switch Bandwidth
• Matched Switch Characteristics ∆RON = 18Ω (Typ) at VDD = 12V
• High Linearity - 0.5% Distortion (Typ) at f = 1kHz, VIN = 5VP-P, VDD = 10V, and RL = 1kΩ
• Standard CMOS Noise Immunity
• 100% Tested for Maximum Quiescent Current at 20V
Ordering Information
PART NUMBER
TEMP. RANGE
(oC) PACKAGE PKG. NO.
CD22100E -40 to 85 16 Ld PDIP E16.3
CD22100F -55 to 125 16 Ld CERDIP F16.3 February 1999
Pinout
CD22100 (PDIP, CERDIP)
TOP VIEW
Functional Diagram
14 15 16
9 13 12 11 10 1
2 3 4 5
7 6
8
VDD
VSS
Y1 Y2 X4 X3 Y4 Y3 X1 STROBE
X2 DATA IN C D B A
ADDRESS 4-LINE TO 16-LINE DECODER 16 CONTROL LATCHES
12 13 14 15
0 1 2 3
4 5 6 7
8 9 10 11
DATA IN
2 STROBE
7
6 A
5 B
3 C
4 D
X1 X2 X3 X4
9 1 12 13
Y4 11 Y3
10 Y2
14 Y1
15
CD22100
CMOS 4 x 4 Crosspoint Switch with Control Memory High-Voltage Type (20V Rating)
[ /Title (CD22 100) /Sub- ject (CMO S 4 x 4 Cross- point Switch with Con- trol Mem- ory High- Volt- age Type (20V Rat- ing)) / Author () /Key- words (Har- ris Semi- con- ductor, Tele- com, SLICs, SLACs , Tele-
OBSOLETE PR NO RECOMMENDED REPLA
Call Central Applications 1-800-442-7747or email: centapp@harris.com
Absolute Maximum Ratings Thermal Information
Supply Voltage (Referenced to VSS Terminal) . . . .-0.5 to 20V Input Voltage (All Inputs) . . . -0.5 to VDD 0.5V Input Current (Any one input (Note 1)). . . .±10mA Power Dissipation
For TA = -40oC to 60oC (Package Type E) . . . 500mW For TA = 60oC to 85oC
(Package Type E) . . . Derate Linearly 12mW/oC to 200mW For TA = -55oC to 100oC (Package Type F) . . . 500mW For TA = 100oC to 125oC
(Package Type F) . . . Derate Linearly 12mW/oC to 200mW Device Dissipation per Transmission Gate
For TA = Full Package Temperature Range (All Types) . . . 100mW
Maximum Junction Temperature . . . 175oC Maximum Junction Temperature (Plastic Package) . . . 150oC Storage Temperature Range . . . -65oC≤ TA≤ 150oC Maximum Lead Temperature (Soldering 10s) . . . 300oC
Operating Conditions
Temperature Range
Package Type F . . . -55oC≤ TA≤125oC Package Type E . . . -40oC≤ TA≤ 85oC Supply Voltage Range
For TA = Full Package Temperature Range . . . 3V to 18V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
Values at -55oC, 25oC, 125oC Apply to F Package Values at -40oC, 25oC, 85oC Apply to E PackagePARAMETER SYMBOL
TEST
CONDITIONS -55oC -40oC 85oC 125oC 25oC
UNITS FIG.
VDD
(V) MAX MAX MAX MAX MIN TYP MAX STATIC CROSSPOINTS
Quiescent Device Current
IDD (Max) 1 5 5 5 150 150 - 0.04 5 µA
1 10 10 10 300 300 - 0.04 10 µA
1 15 20 20 600 600 - 0.04 20 µA
1 20 100 100 3000 3000 - 0.08 100 µA
On Resistance RON (Max) Any Switch VIS = 0 to VDD
11 5 475 500 725 800 - 225 600 Ω
12 10 135 145 205 230 - 85 180 Ω
- 12 100 110 155 175 - 75 135 Ω
13 15 70 75 110 125 - 65 95 Ω
∆RON Resistance ∆RON Between any two switches
- 5 - - - 25 - Ω
- 10 - - - 10 - Ω
- 12 - - - 8 - Ω
- 15 - - - 5 - Ω
OFF Switch Leakage Current
IL (Max) All switches OFF, VIS= 18V
3 18 ±100 ±1000 - ±1 ±100
(Note 2) nA
STATIC CONTROLS
Input Low Voltage VIL (Max) OFF switch
IL < 0.2µA - 5 1.5 - - 1.5 V
- 10 3 - - 3 V
- 15 4 - - 4 V
Input High Voltage VIH (Min) ON switch see RON characteristic
- 5 3.5 3.5 - - V
- 10 7 7 - - V
- 15 11 11 - - V
Input Current IIN (Max) Any control VIN = 0, 18V
2 18 ±0.1 ±0.1 ±1 ±1 - ±10-5 ±0.1 µA
NOTES:
1. Maximum current through transmission gates (switches) = 25mA.
2. Determined by minimum feasible leakage measurement for automatic testing.
Electrical Specifications
TA = 25oCPARAMETER SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS FIGURE
fIS (kHz)
RL (kΩ)
VIS (V) (Note 3)
VDD (V) DYNAMIC CROSSPOINTS
Propagation Delay Time, (Switch ON) Signal Input to Output
tPHL, tPLH 5 - 10 5 5 - 30 60 ns
10 10 - 15 30 ns
15 15 - 10 20 ns
CL = 50pF; tR , tF = 20ns Frequency Response (Any
Switch ON)
f3dB 16 1 1 5 10 - 40 - MHz
Sine Wave Input,
Sine Wave Response (Distortion)
THD 1 1 5 10 - 0.5 - %
Feedthrough (All switches OFF) FDT 1.6 1 5 10 - -80 - dB
Sine Wave Input
Frequency for Signal Crosstalk FCT 7 - 1 10 10
Attenuation of 40dB Sine Wave Input - 1.5 - MHz
Attenuation of 110dB - - - 0.1 - kHz
Capacitance: CIS
Xn to Ground - - - 5 - 15 - 18 - pF
Yn to Ground - - - 5 - 15 - 30 - pF
Feedthrough CIOS - - - 0.4 - pF
DYNAMIC CONTROLS
Propagation Delay Time: tPZH 8 RL = 1kΩ, CL = 50pF, tR , tF = 20ns
5 - 300 600 ns
Strobe to Output (Switch Turn-ON to High Level)
10 - 125 250 ns
15 - 80 160 ns
Propagation Delay Time: tPZH 9 RL = 1kΩ, CL = 50pF, tR , tF = 20ns
5 - 110 220 ns
Data-In to Output (Turn-ON to High Level)
10 - 40 80 ns
15 - 25 50 ns
Propagation Delay Time: tPZH 10 RL = 1kΩ, CL = 50pF, tR , tF = 20ns
5 - 350 700 ns
Address to Output (Turn-ON to High Level)
10 - 135 270 ns
15 - 90 180 ns
Propagation Delay Time: tPHZ 8 RL = 1kΩ, CL = 50pF, tR , tF = 20ns
5 - 165 330 ns
Strobe to Output (Switch Turn-OFF)
10 - 85 170 ns
15 - 70 140 ns
Propagation Delay Time: tPZL 9 RL = 1kΩ, CL = 50pF, tR , tF = 20ns
5 - 210 420 ns
Data-In to Output (Turn-ON to Low Level)
10 - 110 220 ns
15 - 100 200 ns
Propagation Delay Time: t 10 R = 1kΩ, 5 - 435 870 ns
20 logVOS VIS
--- = -3dB
Minimum Setup Time Data-In to Strobe, Address
tS 8, 10 RL = 1kΩ, CL = 50pF, tR, tF = 20ns
5 - 95 190 ns
10 - 25 50 ns
15 - 15 30 ns
Minimum Hold Time Data-In to Strobe, Address
tH 8, 10 RL = 1kΩ, CL = 50pF, tR, tF = 20ns
5 - 180 360 ns
10 - 110 220 ns
15 - 35 70 ns
Maximum Switching Frequency fØ RL = 1kΩ, CL = 50pF, tR, tF = 20ns
5 0.6 1.2 - MHz
10 1.6 3.2 - MHz
15 2.5 5 - MHz
Minimum Strobe Pulse Width tW 8 5 - 300 600 ns
10 - 120 240 ns
15 - 90 180 ns
Control Crosstalk, Data-In, Address or Strobe to Output
6 Square Wave Input;
tR, tF = 20ns
10 - 75 - mVPEAK
- 10 10
Input Capacitance CIN Any Control Input - - 5 7.5 pF
NOTE:
3. Peak-to-peak voltage symmetrical about .
Electrical Specifications
TA = 25oC (Continued)PARAMETER SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS FIGURE
fIS (kHz)
RL (kΩ)
VIS (V) (Note 3)
VDD (V)
VDD ---2
Schematic Diagram
TRUTH TABLE ADDRESS
SELECT
ADDRESS
SELECT
A B C D A B C D
0 0 0 0 X1Y1 0 0 0 1 X1Y3
1 0 0 0 X2Y1 1 0 0 1 X2Y3
0 1 0 0 X3Y1 0 1 0 1 X3Y3
1 1 0 0 X4Y1 1 1 0 1 X4Y3
0 0 1 0 X1Y2 0 0 1 1 X1Y4
1 0 1 0 X2Y2 1 0 1 1 X2Y4
(NOTE) 6
A
A A
(NOTE) 5
B
B B
(NOTE) 3
C
C C
(NOTE) 4
D
D D
VSS 8
VDD 16
A B C D
D Qø ø
0 1 2 3 LATCH
ø = 1 ENABLES DATA
TG TG TG TG
45 67
TG TG TG TG
89 1011
TG TG TG TG
1213 1415
TG TG TG TG
9 1 12 13
11 10 14 15
Y4 Y3 Y2 Y1
X4 X3
X2 X1
D Q
ø ø
p n
ø ø
p n DETAIL OF LATCHES TO OTHER DECODER GATES/LATCHES
VDD VDD
VSS
IN
OUT Q
DETAIL OF TRANSMISSION GATES (NOTE)
STROBE
7 2
(NOTE) DATA IN
VDD
VSS NOTE: INPUTS PROTECTED
BY COS/MOS PROTECTION NETWORK
(1 OF 16)
LEVEL TRIGGERED
Metallization Mask Layout
Test Circuits and Waveforms
FIGURE 1. QUIESCENT CURRENT TEST CIRCUIT FIGURE 2. INPUT CURRENT TEST CIRCUIT
Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch).
14 15 16
9 13 12 11 10 1
2 3 4 5
7 6
8
VDD
VDD IDD
VSS VSS
14 15 16
9 13 12 11 10 1
2 3 4 5
7 6
8 VDD VDD
VSS VSS
II
NOTE:
MEASURE INPUTS SEQUENTIALLY TO BOTH VDD AND VSS CONNECT ALL UNUSED INPUTS TO EITHER VDD OR VSS
FIGURE 3. OFF SWITCH INPUT OR OUTPUT LEAKAGE CURRENT TEST CIRCUIT
FIGURE 4. DYNAMIC POWER DISSIPATION TEST CIRCUIT AND TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF SWITCHING FREQUENCY
Test Circuits and Waveforms
(Continued)14 15 16
9 13 12 11 10 1
2 3 4 5
7 6
8
VDD VDD
VSS
IDD
CLK
14 15 16
9 13 12 11 10 1
2 3 4 5
7 6
8
ID
CLK Q3 Q4 Q2 Q1
500µF
VDD
0.1µF
CL S
VSS
CL
CL CL
NOTE:
CLOSE SWITCH S AFTER APPLYING VDD
VDD = 15V 10V
5V TA = 25oC
SWITCHING FREQUENCY (Hz)
POWER DISSIPATION PER PACKAGE (µW)
102 103 104 105 106
105
104
103
102
10
CL = 50pF CL = 15pF 10V
CD4029
SW ON
VIS
VOS
10kΩ 50pF
SW = ANY CROSSPOINT STROBE = DATA - IN = VDD
VIS VOS
VDD
VDD tPLH
tPLH 0
50% 50%
50%
50%
CONTROLS
10kΩ SW
0 0 VDD CONTROL
50mV 1kΩ
VOS VIS
SW = ANY CROSSPOINT
FIGURE 7. TEST CIRCUIT AND TYPICAL CROSSTALK BETWEEN SWITCH CIRCUITS IN THE SAME PACKAGE AS A FUNCTON OF SIGNAL FREQUENCY
FIGURE 8. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (STROBE TO SIGNAL OUTPUT, SWITCH TURN-ON OR TURN-OFF)
FIGURE 9. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (DATA-IN TO SIGNAL OUTPUT, SWITCH TURN-ON TO HIGH OR LOW LEVEL)
Test Circuits and Waveforms
(Continued)ON
1kΩ SW
1kΩ VIS
SW = ANY CROSSPOINT
OFF
1kΩ
SW VOS
TA = 25oC VDD = 10V
VIS= 10VP-P SINE WAVE CL = 50pF
RL = 1kΩ
INPUT SIGNAL FREQUENCY (Hz) CROSSTALK20logVOS VIS---dB=
0
-20
-40
-60
-80
-100
-120
102 103 104 105 106
VIS SW VOS
1kΩ 50pF VDD
STROBE DATA-IN
SW = ANY CROSSPOINT
STROBE
VDD DATA-IN
VOS
50%
90%
10%
tS
tH
tPZH
tPHZ 0
50% 50% 50%
tS tH
VDD
VDD 0 0
tW tW
VIS SW VOS
1kΩ 50pF VDD
DATA-IN
SW = ANY CROSSPOINT STROBE = VDD
VIS SW VOS
50pF 1kΩ VDD
VDD DATA-IN
VDD
0
VOS 0
50%
10%
tPZH
VDD DATA-IN
VDD
0
VOS 0
50%
90%
tPZH
FIGURE 10. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (ADDRESS TO SIGNAL OUTPUT, SWITCH TURN-ON OR TURN-OFF)
Typical Performance Curves
FIGURE 11. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT VDD = -VSS = 2.5V
FIGURE 12. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT VDD = -VSS = 5V
Test Circuits and Waveforms
(Continued)DATA-IN
VOS2 ADDRESS
VOS1
VIS SW VOS1
1kΩ 50pF VDD
ADDRESS = 0
SW = ANY CROSSPOINT STROBE = VDD
VIS SW VOS2
1kΩ 50pF VDD
ADDRESS = 1
VDD VDD 0
0
50%
90%
tPZH 0
0 VDD VDD
10%
50% 50%
tH tS
tPHZ
VDD = 2.5V, VSS = -2.5V
25oC
-55oC
SWITCH “ON” RESISTANCE (Ω)
INPUT SIGNAL (V) 300
250
200
150
100
50
0
-4 -3 -2 -1 0 1 2 3 4
TA = 125oC
VDD = 5V, VSS = -5V
TA = 125oC
25oC
-55oC
SWITCH “ON” RESISTANCE (Ω)
INPUT SIGNAL (V)
-10 -7.5 -5 -2.5 0 2.5 5 7.5 10 150
125
100
75
50
25 0
FIGURE 13. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT VDD = -VSS = 7.5V
FIGURE 14. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT TA = 25oC
FIGURE 15. TYPICAL SWITCH ON TRANSFER CHARACTERISTICS (1 OF 16 SWITCHES)
FIGURE 16. TYPICAL SWITCH ON FREQUENCY RESPONSE CHARACTERISTICS
Typical Performance Curves
(Continued)TA = 125oC
25oC -55oC
SWITCH “ON” RESISTANCE (Ω)
INPUT SIGNAL (V)
-10 -7.5 -5 -2.5 0 2.5 5 7.5 10 150
125
100
75
50
25
0
VDD = 7.5V, VSS = -7.5V
VDD = 2.5V, VSS = -2.5V
SWITCH “ON” RESISTANCE (Ω)
INPUT SIGNAL (V) 300
250
200
150
100
50
0
TA = 25oC
±7.5V
±5V
-10 -7.5 -5 -2.5 0 2.5 5 7.5 10
VDD = 10V TA = 25oC
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V) 10
8
6
4
2
0 2 4 6 8 10
RL = 1MΩ, 100kΩ, 10kΩ 500Ω
1kΩ
SW VIS
VOS RL STROBE = VDD DATA-IN = VDD
VSS
RL = 1MΩ
1kΩ 10kΩ
OUTPUT SIGNAL (VOS) RMS (V)
INPUT SIGNAL FREQUENCY (Hz) 2.5
2
1.5
1
0.5
0
105 106 107 108
TA = 25oC, VDD = 5V, VSS = -5V VIS= 5VP-P= SINE WAVE 1.77VRMS
VDATA-IN = 5V CL = 15pF
RF VOLTMETER BOONTON RADIO MODEL 91-CA OR EQUIVALENT
fIS SW VOS (RMS)
CL RL VIS
CIOS = 0.4pF
