DS15BA101

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Serializer Deserializer

DS15BA101 DS15EA101

CML LVPECL

LVDS

150 Mbps to 1.5 Gbps

100-ohm Differential Cable (i.e. CAT5e/6/7, Twinax)

50-ohm Coaxial Cable (i.e. Belden 9914)

Max Cable Loss ~ 35 dB @ 750 MHz

DS15BA101

www.ti.com SNLS234I – OCTOBER 2006 – REVISED JANUARY 2009

DS15BA101 1.5 Gbps Differential Buffer with Adjustable Output Voltage

Check for Samples:DS15BA101

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FEATURES DESCRIPTION

The DS15BA101 is a high-speed differential buffer for

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• Data Rates from DC to 1.5+ Gbps

cable driving, level translation, signal buffering, and

• Differential or Single-ended Input signal repeating applications. Its fully differential

• Adjustable Output Amplitude signal path ensures exceptional signal integrity and noise immunity and it drives both differential and

• Single 3.3V Supply

single-ended transmission lines at data rates in

• Industrial -40°C to +85°C Temperature

excess of 1.5 Gbps.

• Low Power: 150 mW (typ) at 1.5 Gbps

Output voltage amplitude is adjustable via a single

• Space-saving 3 x 3 mm WSON-8 Package external resistor for level translation and cable driving applications into 50-ohm single-ended and 100-ohm

APPLICATIONS differential mode impedances.

• Cable Extension Applications The DS15BA101 is powered from a single 3.3V

• Level Translation supply and consumes 150 mW (typ) at 1.5 Gbps. It operates over the full −40°C to +85°C industrial

• Signal Buffering and Repeating

temperature range and is available in a space saving

• Security Cameras 3x3 mm WSON-8 package.

Typical Application

Figure 1.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

⁽¹⁾

Supply Voltage −0.5V to 3.6V

Input Voltage (all inputs) −0.3V to V_CC+0.3V

Output Current 28 mA

Storage Temperature Range −65°C to +150°C

Junction Temperature +150°C

Lead Temperature

(Soldering 4 Sec) +260°C

θ_JAWSON-8 +90.7°C/W

Package Thermal Resistance

θ_JCWSON-8 +41.2°C/W

ESD Rating (HBM) 5 kV

ESD Rating (MM) 250V

(1) "Absolute Maximum Ratings" are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values.

The table of "Electrical Characteristics" specifies acceptable device operating conditions.

Recommended Operating Conditions

Supply Voltage (VCC – GND): 3.3V ±5%

Operating Free Air Temperature (TA)

DS15BA101SD −40°C to +85°C

DC Electrical Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.^{(1) (2)}

Symbol Parameter Conditions Reference Min Typ Max Units

VICM Input Common Mode Voltage See⁽³⁾ IN+, IN- VCC–

0.8 V_ID/2 V

V_ID Differential Input Voltage Swing 100 2000 mV_P−P

VOS Output Common Mode Voltage OUT+, OUT- VCC–

V_OUT/2 V

V_OUT Output Voltage Single-ended, 25Ωload

400 mVP-P

RVO= 953Ω1%, Single-ended, 25Ωload

800 mV_P-P

R_VO= 487Ω1%,

ICC Supply Current See⁽⁴⁾ 45 49 mA

(1) Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to GND.

(2) Typical values are stated for VCC= +3.3V and TA= +25°C.

(3) Specification is guaranteed by characterization.

(4) Maximum ICCis measured at VCC= +3.465V and TA= +70°C.

2 Submit Documentation Feedback

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IN+

IN-

GND

RVO

OUT+

OUT-

GND

VCC 1

2

3

4

8

6

5 7

(GND) DAP

DS15BA101

AC Electrical Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified⁽¹⁾.

Symbol Parameter Conditions Reference Min Typ Max Units

DR_MAX Maximum Data Rate See⁽²⁾ IN+, IN- 1.5 2.0 Gbps

t_LHT Output Low to High Transition 20% – 80%⁽³⁾ OUT+, OUT-

120 220 ps

Time

t_HLT Output High to Low Transition

120 220 ps

Time

tPLHD Propagation Low to High Delay See⁽²⁾ 0.95 1.10 1.35 ns

tPHLD Propagation High to Low Delay See⁽²⁾ 0.95 1.10 1.35 ns

t_TJ Total Jitter 1.5 Gbps 26 ps_P-P

(1) Typical values are stated for V_CC= +3.3V and T_A= +25°C.

(2) Specification is guaranteed by characterization.

(3) Specification is guaranteed by characterization and verified by test.

CONNECTION DIAGRAM

Figure 2. 8-Pad WSON See NGQ Package

PIN DESCRIPTIONS

Pin # Name Description

1 IN+ Non-inverting input pin.

2 IN- Inverting input pin.

3 GND Circuit common (ground reference).

4 RVO Output voltage amplitude control. Connect a resistor to VCCto set output voltage.

5 VCC Positive power supply (+3.3V).

6 GND Circuit common (ground reference).

7 OUT- Inverting output pin.

8 OUT+ Non-inverting output pin.

Product Folder Links:DS15BA101

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OUT+

OUT-

DS15BA101

IN+

IN-

50: 50:

100: Differential T-Line

LVPECL ^100:

OUT+

OUT-

DS15BA101

IN+

IN- 50:

50: VCC

CML3.3V or CML2.5V

100:

OUT+

OUT-

DS15BA101

IN+

IN- 100:

LVDS

DEVICE OPERATION INPUT INTERFACING

The DS15BA101 accepts either differential or single-ended input. The inputs are self-biased, allowing for simple AC or DC coupling. DC-coupled inputs must be kept within the specified common-mode range. The IN+ and IN- pins are self-biased at approximately 2.1V with V

_CC

= 3.3V. The following three figures illustrate typical DC- coupled interface to common differential drivers.

Figure 3. Typical LVDS Driver DC-Coupled Interface to DS15BA101 Input

Figure 4. Typical CML Driver DC-Coupled Interface to DS15BA101 Input

Figure 5. Typical LVPECL Driver DC-Coupled Interface to DS15BA101 Input

OUTPUT INTERFACING

The DS15BA101 uses current mode outputs. Single-ended output levels are 400 mV

_P-P

into AC-coupled 100Ω differential cable (with R

_VO

= 953Ω) or into AC-coupled 50Ω coaxial cable (with R

_VO

= 487Ω). Output level is controlled by the value of the R

_VO

resistor connected between the R

_VO

and V

_CC

.

The R

_VO

resistor should be placed as close as possible to the R

_VO

pin. In addition, the copper in the plane layers below the R

_VO

network should be removed to minimize parasitic capacitance. The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance inputs. While most receivers have a common mode input range that can accomodate CML signals, it is recommended to check respective receiver's datasheet prior to implementing the suggested interface implementation.

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DS15BA101

OUT- IN+

IN-

OUT+

0.1 PF 50:

487: 50:

100:

1 PF 1 PF

1 PF

DS15EA101

IN+

IN- 50:

1 PF OUT+

OUT-

CAP+ CAP-

0.1 PF V_CC

V_CC

25:

50: Coaxial Cable

R_VO

DS15BA101

OUT- IN+

IN-

OUT+

0.1 PF 50:

953: 50:

100:

1 PF

DS15EA101

IN+

IN- 100:

1 PF OUT+

OUT-

CAP+ CAP-

0.1 PF VCC

VCC

100: Differential TP Cable

R_VO OUT+

OUT-

CML or LVPECL or LVDS

IN+

IN- 50: 50:

VCC

100:

DS15BA101

Figure 6. Typical DS15BA101 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver

CABLE EXTENDER APPLICATION

The DS15BA101 together with the DS15EA101 form a cable extender chipset optimized for extending serial data streams from serializer/deserializer (SerDes) pairs and field programmable gate arrays (FPGAs) over 100Ω differential (i.e. CAT5e/6/7 and twinax) and 50Ω coaxial cables. Setting correct DS15BA101 output amplitude and proper cable termination are keys for optimal operation. The following two figures show recommended chipset configuration for 100Ω differential and 50Ω coaxial cables.

Figure 7. Cable Extender Chipset Connection Diagram for 100Ω Differential Cables

Figure 8. Cable Extender Chipset Connection Diagram for 50Ω Coaxial Cables

Product Folder Links:DS15BA101

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REFERENCE DESIGN

There is a complete reference design (P/N: DriveCable02EVK) available for evaluation of the cable extender chipset (DS15BA101 and DS15EA101). For more information, visit http://www.ti.com/tool/drivecable02evk.

Typical Performance

Figure 9. 1.5 Gbps Differential DS15BA101 Output Figure 10. 1.5 Gbps Single-ended DS15BA101 Output R_VO= 953Ω, H:100 ps / DIV, V:100 mV / DIV R_VO= 487Ω, H:100 ps / DIV, V:100 mV / DIV

Figure 11. 2.0 Gbps Differential DS15BA101 Output Figure 12. 2.0 Gbps Single-ended DS15BA101 Output RVO= 953Ω, H:100 ps / DIV, V:100 mV / DIV RVO= 487Ω, H:100 ps / DIV, V:100 mV / DIV

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PACKAGE OPTION ADDENDUM

www.ti.com 24-Jan-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package Drawing

Pins Package Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Top-Side Markings

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Samples

DS15BA101SD/NOPB ACTIVE WSON NGQ 8 1000 Green (RoHS

& no Sb/Br)

CU SN Level-3-260C-168 HR -40 to 85 BA101

DS15BA101SDE/NOPB ACTIVE WSON NGQ 8 250 Green (RoHS

& no Sb/Br)

DS15BA101SDX/NOPB ACTIVE WSON NGQ 8 4500 Green (RoHS

& no Sb/Br)

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) Only one of markings shown within the brackets will appear on the physical device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type

Package Drawing

Pins SPQ Reel

Diameter (mm)

Reel Width W1 (mm)

A0 (mm)

B0 (mm)

K0 (mm)

P1 (mm)

W (mm)

Pin1 Quadrant

DS15BA101SD/NOPB WSON NGQ 8 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

DS15BA101SDE/NOPB WSON NGQ 8 250 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

DS15BA101SDX/NOPB WSON NGQ 8 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

www.ti.com 26-Mar-2013

Pack Materials-Page 1

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*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

DS15BA101SD/NOPB WSON NGQ 8 1000 213.0 191.0 55.0

DS15BA101SDE/NOPB WSON NGQ 8 250 213.0 191.0 55.0

DS15BA101SDX/NOPB WSON NGQ 8 4500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 26-Mar-2013

Pack Materials-Page 2

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SDA08A (Rev A)

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