Clock Control

System control determines the control of clocks in this part.

5.2.5.1 Fundamental Clock Sources

There are multiple clock sources for use in the microcontroller:

■ Precision Internal Oscillator (PIOSC). The precision internal oscillator is an on-chip clock source that is the clock source the microcontroller uses during and following POR. It does not require the use of any external components and provides a clock that is 16 MHz ±1% at room temperature and ±3% across temperature. The PIOSC allows for a reduced system cost in applications that require an accurate clock source. If the main oscillator is required, software must enable the main oscillator following reset and allow the main oscillator to stabilize before changing the clock reference. If the Hibernation Module clock source is a 32.768-kHz oscillator, the precision internal oscillator can be trimmed by software based on a reference clock for increased accuracy.

■ Main Oscillator (MOSC). The main oscillator provides a frequency-accurate clock source by one of two means: an external single-ended clock source is connected to theOSC0input pin, or an external crystal is connected across theOSC0input andOSC1output pins. If the PLL is being used, the crystal value must be one of the supported frequencies between 3.579545 MHz to

16.384 MHz (inclusive). If the PLL is not being used, the crystal may be any one of the supported frequencies between 1 MHz to 16.384 MHz. The single-ended clock source range is from DC through the specified speed of the microcontroller. The supported crystals are listed in theXTAL bit field in the RCC register (see page 219).

■ Internal 30-kHz Oscillator. The internal 30-kHz oscillator provides an operational frequency of 30 kHz ± 50%. It is intended for use during Deep-Sleep power-saving modes. This power-savings mode benefits from reduced internal switching and also allows the MOSC to be powered down.

■ Hibernation Module Clock Source. The Hibernation module can be clocked in one of two ways.

The first way is a 4.194304-MHz crystal connected to theXOSC0andXOSC1pins. This clock signal is divided by 128 internally to produce the 32.768-kHz clock reference. The second way is a 32.768-kHz oscillator connected to theXOSC0pin. The 32.768-kHz oscillator can be used for the system clock, thus eliminating the need for an additional crystal or oscillator. The Hibernation module clock source is intended to provide the system with a real-time clock source and may also provide an accurate source of Deep-Sleep or Hibernate mode power savings.

The internal system clock (SysClk), is derived from any of the above sources plus two others: the output of the main internal PLL and the precision internal oscillator divided by four (4 MHz ± 1%).

The frequency of the PLL clock reference must be in the range of 3.579545 MHz to 16.384 MHz (inclusive). Table 5-4 on page 197 shows how the various clock sources can be used in a system.

Table 5-4. Clock Source Options

Used as SysClk?

Drive PLL?

Clock Source

BYPASS= 1,OSCSRC= 0x1 Yes

BYPASS= 0, OSCSRC= 0x1 Yes

Precision Internal Oscillator

BYPASS= 1,OSCSRC= 0x2 Yes

-No

Precision Internal Oscillator divide by 4 (4 MHz ± 1%)

BYPASS= 1,OSCSRC= 0x0 Yes

BYPASS= 0, OSCSRC= 0x0 Yes

Main Oscillator

BYPASS= 1,OSCSRC= 0x3 Yes

-No

Internal 30-kHz Oscillator

BYPASS= 1,OSCSRC2= 0x7 Yes

-No

Hibernation Module 32.768-kHz Oscillator

-No

-No

Hibernation Module 4.194304-MHz Crystal

5.2.5.2 Clock Configuration

The Run-Mode Clock Configuration (RCC) and Run-Mode Clock Configuration 2 (RCC2) registers provide control for the system clock. The RCC2 register is provided to extend fields that offer additional encodings over the RCC register. When used, the RCC2 register field values are used by the logic over the corresponding field in the RCC register. In particular, RCC2 provides for a larger assortment of clock configuration options. These registers control the following clock functionality:

■ Source of clocks in sleep and deep-sleep modes

■ System clock derived from PLL or other clock source

■ Enabling/disabling of oscillators and PLL

■ Clock divisors

■ Crystal input selection

Important: Write the RCC register prior to writing the RCC2 register. If a subsequent write to the RCC register is required, include another register access after writing the RCC register and before writing the RCC2 register.

Figure 5-5 shows the logic for the main clock tree. The peripheral blocks are driven by the system clock signal and can be individually enabled/disabled. When the PLL is enabled, the ADC clock signal is automatically divided down to 16 MHz from the PLL output for proper ADC operation. The PWM clock signal is a synchronous divide of the system clock to provide the PWM circuit with more range (set withPWMDIVin RCC).

Note: When the ADC module is in operation, the system clock must be at least 16 MHz.

Figure 5-5. Main Clock Tree

Main OSC

Precision Internal OSC

(16 MHz)

Internal OSC (30 kHz)

÷ 4

÷ 25

PWRDN

ADC Clock System Clock MOSCDIS^a

IOSCDIS^a

SYSDIV^e

USESYSDIV^a,d PWMDW^a

USEPWMDIV^a

PWM Clock

Hibernation OSC (32.768 kHz)

OSCSRC^b,d

BYPASS^b,d XTAL^a

PWRDN^b

÷ 2 USB PLL

(480 MHz) ÷ 4 USB Clock

XTAL^a USBPWRDN^c

RXINT

RXFRAC I²S Receive MCLK

I²S Transmit MCLK

PLL (400 MHz)

TXINT TXFRAC

a. Control provided by RCC register bit/field.

b. Control provided by RCC register bit/field or RCC2 register bit/field, if overridden with RCC2 register bitUSERCC2.

c. Control provided by RCC2 register bit/field.

d. Also may be controlled by DSLPCLKCFG when in deep sleep mode.

e. Control provided by RCC registerSYSDIVfield, RCC2 registerSYSDIV2field if overridden withUSERCC2bit, or [SYSDIV2,SYSDIV2LSB] if bothUSERCC2andDIV400bits are set.

DIV400^c

Note: The figure above shows all features available on all Stellaris® Tempest-class microcontrollers. Not all peripherals may be available on this device.

Using the SYSDIV and SYSDIV2 Fields

In the RCC register, theSYSDIVfield specifies which divisor is used to generate the system clock from either the PLL output or the oscillator source (depending on how theBYPASSbit in this register