IR2109

(1)

Typical Connection

•

Floating channel designed for bootstrap operation Fully operational to +600V

Tolerant to negative transient voltage dV/dt immune

•

Gate drive supply range from 10 to 20V

•

Undervoltage lockout for both channels

•

3.3V, 5V and 15V input logic compatible

•

Cross-conduction prevention logic

•

Matched propagation delay for both channels

•

High side output in phase with IN input

•

Logic and power ground +/- 5V offset.

•

Internal 540ns dead-time, and programmable up to 5us with one external R_DT resistor (IR21094)

•

Lower di/dt gate driver for better noise immunity

•

Shut down input turns off both channels.

Description

The IR2109(4)(S) are high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable rugge- dized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver

IR21094 IR2109

Packages

V _OFFSET 600V max.

I O +/- 120 mA / 250 mA

V OUT 10 - 20V

t on/off (typ.) 750 & 200 ns

Dead Time 540 ns

(programmable up to 5uS for IR21094)

Product Summary

V_CC V_B

V_S HO

LO COM IN SD

SD IN

up to 600V

TO LOAD VCC

IN

up to 600V

TO LOAD V_CC V_B

V_S HO

LO COM IN

DT V_SS SD V_CC

SD

V_SS

R_DT

8 Lead PDIP

14 Lead PDIP 8 Lead SOIC

14 Lead SOIC

cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.

(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

(2)

Symbol Definition Min. Max. Units

V_B High side floating absolute voltage -0.3 625

V_S High side floating supply offset voltage V_B - 25 V_B + 0.3

V_HO High side floating output voltage V_S - 0.3 V_B+ 0.3

V_CC Low side and logic fixed supply voltage -0.3 25

V_LO Low side output voltage -0.3 V_CC + 0.3

DT Programmable dead-time pin voltage (IR21094 only) V_SS - 0.3 V_CC+ 0.3

V_IN Logic input voltage (IN & SD) V_SS - 0.3 V_CC+ 0.3

V_SS Logic ground (IR21094/IR21894 only) V_CC- 25 V_CC+ 0.3

dV_S/dt Allowable offset supply voltage transient — 50 V/ns

P_D Package power dissipation @ T_A ≤ +25°C (8 Lead PDIP) — 1.0

(8 Lead SOIC) — 0.625

(14 lead PDIP) — 1.6 (14 lead SOIC) — 1.0 Rth_JA Thermal resistance, junction to ambient (8 Lead PDIP) — 125

(8 Lead SOIC) — 200

(14 lead PDIP) — 75

(14 lead SOIC) — 120

T_J Junction temperature — 150

T_S Storage temperature -50 150

T_L Lead temperature (soldering, 10 seconds) — 300

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.

V

°C

°C/W W

(3)

Dynamic Electrical Characteristics

V_BIAS (V_CC, V_BS) = 15V, V_SS = COM, C_L = 1000 pF, T_A = 25°C, DT = VSS unless otherwise specified.

Symbol Definition Min. Typ. Max. Units Test Conditions

ton Turn-on propagation delay — 750 950 V_S = 0V

toff Turn-off propagation delay — 200 280 V_S= 0V or 600V

tsd Shut-down propagation delay — 200 280

MT Delay matching, HS & LS turn-on/off — 0 70

tr Turn-on rise time — 150 220 V_S = 0V

tf Turn-off fall time — 50 80 V_S = 0V

DT Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 400 540 680 RDT= 0 HO turn-off to LO turn-on (DT_HO-LO) 4 5 6 usec RDT = 200k (IR21094)

MDT Deadtime matching = DTLO - HO - DTHO-LO — 0 60 RDT=0

— 0 600 RDT = 200k (IR21094)

nsec nsec

Note 1: Logic operational for V_S of -5 to +600V. Logic state held for V_S of -5V to -V_BS. (Please refer to the Design Tip DT97-3 for more details).

VB High side floating supply absolute voltage V_S + 10 V_S + 20

V_S High side floating supply offset voltage Note 1 600

V_HO High side floating output voltage V_S V_B

V_CC Low side and logic fixed supply voltage 10 20

V_LO Low side output voltage 0 V_CC

V_IN Logic input voltage (IN & SD) V_SS V_CC

DT Programmable dead-time pin voltage (IR21094 only) V_SS V_CC

V_SS Logic ground (IR21094 only) -5 5

T_A Ambient temperature -40 125

°

C

Symbol Definition Min. Max. Units

recommended conditions. The V_S and V_SS offset rating are tested with all supplies biased at 15V differential.

V

(4)

Static Electrical Characteristics

V_BIAS (V_CC, V_BS) = 15V, V_SS = COM, DT= V_SS and T_A = 25°C unless otherwise specified. The V_IL, V_IH and I_IN parameters are referenced to V_SS/COM and are applicable to the respective input leads: IN and SD. The V_O, I_O and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol Definition Min. Typ. Max. Units Test Conditions

V_IH Logic “1” input voltage for HO & logic “0” for LO 2.9 — — V_CC = 10V to 20V V_IL Logic “0” input voltage for HO & logic “1” for LO — — 0.8 V_CC = 10V to 20V

V_SD,TH+ SD input positive going threshold 2.9 — — V_CC = 10V to 20V

V_SD,TH- SD input negative going threshold — — 0.8 V_CC = 10V to 20V

V_OH High level output voltage, V_BIAS - V_O — 0.8 1.4 I_O = 20 mA

V_OL Low level output voltage, V_O — 0.3 0.6 I_O = 20 mA

I_LK Offset supply leakage current — — 50 V_B = V_S = 600V

I_QBS Quiescent V_BS supply current 20 75 130 V_IN= 0V or 5V

I_QCC Quiescent V_CC supply current 0.4 1.0 1.6 mA V_IN = 0V or 5V

RDT = 0

I_IN+ Logic “1” input bias current — 5 20 IN = 5V, SD = 0V

I_IN- Logic “0” input bias current — — 2 IN = 0V, SD = 5V

V_CCUV+ V_CC and V_BSsupply undervoltage positive going 8.0 8.9 9.8 V_BSUV+ threshold

V_CCUV- V_CC and V_BS supply undervoltage negative going 7.4 8.2 9.0 V_BSUV- threshold

V_CCUVH Hysteresis 0.3 0.7 —

V_BSUVH

I_O+ Output high short circuit pulsed vurrent 120 200 — V_O = 0V, PW ≤ 10 µs I_O- Output low short circuit pulsed current 250 350 — V_O = 15V,PW ≤ 10 µs

V

µA

V µA

mA

(5)

IR2109

SD

UV DETECT

DELAY COM

LO VCC

IN VS

HO VB

PULSE FILTER HV

LEVEL SHIFTER

R R S

Q UV

DETECT

PULSE GENERATOR

VSS/COM LEVEL SHIFT VSS/COM

LEVEL SHIFT

+5V

DEADTIME

SD

UV DETECT

DELAY

COM LO VCC IN

DT

VSS

VS HO VB

PULSE FILTER HV

LEVEL SHIFTER

R R S

Q UV

DETECT

PULSE GENERATOR

VSS/COM LEVEL SHIFT VSS/COM

LEVEL SHIFT

+5V

DEADTIME

IR21094

(6)

IR21094 IR21094S

Lead Assignments

1 2 3 4

8 7 6 5 VCC

IN SD COM

VB HO VS LO

1 2 3 4

8 7 6 5 VCC

IN SD COM

VB HO VS LO

1 2 3 4 5 6 7

14 13 12 11 10 9 8 VCC

IN SD DT VSS COM LO

VB HO VS

1 2 3 4 5 6 7

14 13 12 11 10 9 8 VCC

IN SD DT VSS COM LO

VB HO VS

Lead Definitions

Symbol Description

IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM for IR2109 and VSS for IR21094)

SD Logic input for shutdown (referenced to COM for IR2109 and VSS for IR21094) DT Programmable dead-time lead, referenced to VSS. (IR21094 only)

VSS Logic Ground (21094 only) V_B High side floating supply HO High side gate drive output V_S High side floating supply return V_CC Low side and logic fixed supply LO Low side gate drive output COM Low side return

IR2109 IR2109S

(7)

Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions

Figure 4. Deadtime Waveform Definitions IN

HO

50% 50%

90%

10%

LO _90%

10%

DT_LO-HO

MDT= - DT_HO-LO

DT_HO-LO SD

HO

LO

IN^(HO)

ton tr toff tf

LO HO

50% 50%

90% 90%

10% 10%

Figure 3. Shutdown Waveform Definitions SD

tsd

HO LO

50%

90%

Figure 5. Delay Matching Waveform Definitions HO

50% 50%

10%

LO

90%

MT

HO LO

MT IN(LO)

IN(HO)

(8)

500 700 900 1100 1300

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Turn-on Propagation Delay (ns)

Typ.

M ax

500 700 900 1100 1300

10 12 14 16 18 20

V_BIAS Supply Voltage (V)

Turn-on Propagation Delay (ns)

Typ.

M ax.

0 100 200 300 400 500

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Turn-off Propagation Delay (ns)

M ax.

Typ.

0 100 200 300 400 500

10 12 14 16 18 20

Turn-off Propagation Delay (ns)

Typ.

M ax.

Figure 6A. Turn-on Propagation Delay vs. Temperature

Figure 6B. Turn-on Propagation Delay vs. Supply Voltage

Figure 7A. Turn-off Propagation Delay vs. Temperature

Figure 7B. Turn-off Propagation Delay vs. Supply Voltage

(9)

0 100 200 300 400

-50 -25 0 25 50 75 100 125

Temperature (^oC)

SD Propagation Delay (ns)

M ax.

Typ.

0 100 200 300 400

10 12 14 16 18 20

SD Propagation Delay (ns)

Typ.

M ax.

0 100 200 300 400 500

-50 -25 0 25 50 75 100 125

T e m p e ra tu re (^oC )

Turn-on Rise Time (ns)

M ax.

Typ.

i i i

0 100 200 300 400 500

10 12 14 16 18 20

V_BIAS S u p p ly V o lta g e (V )

Turn-on Rise Time (ns)

Typ.

M ax.

Figure 8A. SD Propagation Delay vs. Temperature

Figure 8B. SD Propagation Delay vs. Supply Voltage

Figure 9A. Turn-on Rise Time vs. Temperature

Figure 9B. Turn-on Rise Time vs. Supply Voltage

(10)

0 50 100 150 200

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Turn-off Fall Time (ns)

M ax.

Typ.

0 50 100 150 200

10 12 14 16 18 20

Turn-off Fall Time (ns)

Typ.

M ax.

200 400 600 800 1000

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Deadtime (ns)

M in.

Typ.

M ax.

200 400 600 800 1000

10 12 14 16 18 20

V_BIAS Supply Voltage (V) Deadtime (ns) ^{M ax.}

Typ.

M in.

Figure 10A. Turn-off Fall Time vs. Temperature

Figure 10B. Turn-off Fall Time vs. Supply Voltage

Figure 11A. Deadtime vs. Temperature Figure 11B. Deadtime vs. Supply Voltage

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0 1 2 3 4

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Logic "1" Input Voltage (V)

M ax.

0 1 2 3 4 5 6

0 50 100 150 200

R_DT (KΩ)

Deadtime (s) ^Typ.

M ax.

M in.

0 1 2 3 4 5

10 12 14 16 18 20

V_CC Supply Voltage (V)

M ax.

0 1 2 3 4 5

-50 -25 0 25 50 75 100 125

Temperature (^oC)

M in.

Figure 11C. Deadtime vs. RDT (IR21094 only)

Figure 12A. Logic “1” Input Voltage vs. Temperature

Figure 12B. Logic “1” Input Voltage vs. Supply Voltage

Figure 13A. Logic “0” Input Voltage vs. Temperature

(12)

0 1 2 3 4 5

10 12 14 16 18 20

M in.

0 1 2 3 4 5

-50 -25 0 25 50 75 100 125

Temperature (^oC)

SD Positive Going Threshold (V)

M ax.

0 1 2 3 4 5

10 12 14 16 18 20

SD Positive Going Threshold (V)

M ax.

0 1 2 3 4 5

-50 -25 0 25 50 75 100 125

Temperature (^oC)

SD Negative Going Threshold (V)

M in.

Figure 13B. Logic “0” Input Current vs. Supply Voltage

Figure 14A. SD Positive Going Threshold vs. Temperature

Figure 14B. SD Positive Going Threshold vs. Supply Voltage

Figure 15A. SD Negative Going Threshold vs. Temperature

(13)

0 0.3 0.6 0.9 1.2 1.5

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Low Level Output Voltage (V)

Typ.

M ax.

0 1 2 3 4

10 12 14 16 18 20

SD Negative Going Threshold (V

M in.

0 1 2 3

-50 -25 0 25 50 75 100 125

Temperature (^oC)

High Level Output Voltage (V)

Typ.

M ax.

0 1 2 3 4

10 12 14 16 18 20

High Level Output Voltage (V)

Typ.

M ax.

Figure 15B. SD Negative Going Threshold vs. Supply Voltage

Figure 16A. High Level Output Voltage vs. Temperature

Figure 16B. High Level Output Voltage vs. Supply Voltage

Figure 17A. Low Level Output Voltage vs. Temperature

(14)

0 100 200 300 400 500

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Offset Supply Leakage Current (A)

M ax.

0 100 200 300 400 500

0 100 200 300 400 500 600

V_BB o o s t V o lta g e (V )

Offset Supply Leakage Current (A)

M ax.

0 100 200 300 400

-50 -25 0 25 50 75 100 125

T e m p e ra tu re (^oC ) VBS Supply Current (A)

Typ.

M ax.

M in.

0 0.3 0.6 0.9 1.2 1.5

10 12 14 16 18 20

V_BIASSupply Voltage (V)

Low Level Output Voltage (V)

Typ.

M ax.

Figure 17B. Low Level Output Voltage vs. Supply Voltage

Figure 18A. Offset Supply Leakage Current vs. Temperature

igure 18B. Offset Supply Leakage Current vs. Boost Voltage

Figure 19A. VBS Supply Current vs. Temperature

(15)

0 100 200 300

10 12 14 16 18 20

V_{B S} S u p p ly V o lta g e (V ) VBS Supply Current (A)

Typ.

M ax.

M in.

0.0 0.5 1.0 1.5 2.0 2.5

-50 -25 0 25 50 75 100 125

Vcc Supply Current (mA)

M ax.

Typ.

M in.

0 10 20 30 40 50 60

-50 -25 0 25 50 75 100 125

Logic "1" Input Current (A)

Typ.

M ax.

i 21 i 1 C

0.0 0.5 1.0 1.5 2.0 2.5 3.0

10 12 14 16 18 20

VCC S u p p ly V o lta g e (V ) VCC Supply Current (mA)

i

M ax.

Typ.

M in.

Figure 19B. VBS Supply Current vs. Supply Voltage

Figure 20A. VCC Supply Current vs. Temperature

Figure 20B. VCC Supply Current vs. VCC Supply Voltage

Figure 21A. Logic “1” Input Current vs. Temperature

(16)

0 10 20 30 40 50 60

10 12 14 16 18 20

M ax.

Typ.

0 1 2 3 4 5

-50 -25 0 25 50 75 100 125

Temperature (^oC)

M ax.

7 8 9 10 11 12

-50 -25 0 25 50 75 100 125

Temperature (^oC) VCC UVLO Threshold (+) (V)

Typ.

M ax.

M in.

0 1 2 3 4 5

10 12 14 16 18 20

M ax.

Figure 21B. Logic “1” Input Current vs. Supply Voltage

Figure 22A. Logic “0” Input Current vs. Temperature

Figure 22B. Logic “0” Input Currentt vs. Supply Voltage

Figure 23. VCC Undervoltage Threshold (+) vs. Temperature

(17)

6 7 8 9 10

-50 -25 0 25 50 75 100 125

Temperature (^oC) VCC UVLO Threshold (-) (V)

Typ.

M ax.

M in.

7 8 9 10 11

-50 -25 0 25 50 75 100 125

Temperature (^oC) VBS UVLO Threshold (+) (V)

Typ.

M ax.

M in.

6 7 8 9 10 11

-50 -25 0 25 50 75 100 125

T e m p e ra tu re (^oC ) VBS UVLO Threshold (-) (V)

Typ.

M ax.

M in.

0 100 200 300 400 500

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Output Source Current (A)

Typ.

M in.

Figure 24. VCC Undervoltage Threshold (-) vs. Temperature

Figure 25. VBS Undervoltage Threshold (+) vs. Temperature

Figure 26. VBS Undervoltage Threshold (-) vs. Temperature

Figure 27A. Output Source Current vs. Temperature

(18)

0 100 200 300 400 500

10 12 14 16 18 20

Output Source Current (A)

Typ.

M in.

0 100 200 300 400 500 600

-50 -25 0 25 50 75 100 125

Temperature (^oC)

Output Sink Current (A)

Typ.

M in.

0 100 200 300 400 500 600

10 12 14 16 18 20

Output Sink Current (A)

Typ.

M in.

-10 -8 -6 -4 -2 0

10 12 14 16 18 20

V_BSFlouting Supply Voltage (V) VS Offset Supply Voltage (V)

Typ.

Figure 27B. Output Source Current vs. Supply Voltage

Figure 28A. Output Sink Current vs. Temperature

Figure 28B. Output Sink Currentt vs. Supply Voltage

Figure 29. Maximum VS Negative Offset vs. Supply Voltage

(19)

20 40 60 80 100 120

1 10 100 1000

Frequency (KHz) Junction Temperature (oC)

210V

140V

70V 0V

20 40 60 80 100 120

1 10 100 1000

210V 140V 70V 0V

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

Frequency (KHz)

Junction Temperature (oC) ^210V

140V

70V

0V

Figure 30. IR2109 vs Frequency (IRFBC20)

Rgate = 33ΩΩΩΩΩ, VCC = 15V Figure 31. IR2109 vs Frequency (IRFBC30) Rgate = 22ΩΩΩΩΩ, VCC = 15V

Rgate = 15ΩΩΩΩΩ, VCC = 15V Figure 33. IR2109 vs Frequency (IRFPE50) Rgate = 10ΩΩΩΩΩ, VCC = 15V

(20)

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

Frequency (KHz)

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

210V 140V

70V

0V

Figure 34. IR2109S vs Frequency (IRFBC20)

Rgate = 33ΩΩΩΩΩ, VCC = 15V Figure 35. R2109S vs Frequency (IRFBC30) Rgate = 22ΩΩΩΩ, VCC = 15VΩ

Figure 36. R2109S vs Frequency (IRFBC40)

Rgate = 15ΩΩΩΩ, VCC = 15VΩ Figure 37. R2109S vs Frequency (IRFPE50) Rgate = 10ΩΩΩΩΩ, VCC = 15V

(21)

20 40 60 80 100 120

1 10 100 1000

210V 140V

70V 0V

20 40 60 80 100 120

1 10 100 1000

210V

140V

70V 0V

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V 0V

Rgate = 33ΩΩΩΩΩ, VCC = 15V Figure 39. IR21094 vs Frequency (IRFBC30) Rgate = 22ΩΩΩΩΩ, VCC = 15V

Rgate = 15ΩΩΩΩ, VCC = 15VΩ Figure 41. IR21094 vs Frequency (IRFPE50) Rgate = 10ΩΩΩΩΩ, VCC = 15V

(22)

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V 0V

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

210V

140V

70V

0V

20 40 60 80 100 120 140

1 10 100 1000

F re q u e n c y (K H z )

140V

70V

0V

Figure 42. IR21094S vs Frequency (IRFBC20)

Rgate = 33ΩΩΩΩΩ, VCC = 15V Figure 43. R21094S vs Frequency (IRFBC30) Rgate = 22ΩΩΩΩΩ, VCC = 15V

Figure 44. R21094S vs Frequency (IRFBC40) Rgate = 15ΩΩΩΩΩ, VCC = 15V

Figure 45. R21094S vs Frequency (IRFPE50) Rgate = 10ΩΩΩΩΩ, VCC = 15V

(23)

01-6027 01-0021 11

8 Lead SOIC

8 7 5

6 5

D B

E A

e 6X

H 0.25 [.010] A 6

4 3 1 2

4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.

NOTES:

1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.

2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].

7 K x 45°

8X L 8X c

y

FOOTPRINT 8X 0.72 [.028]

6.46 [.255]

3X 1.27 [.050] 8X 1.78 [.070]

5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.

6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.

MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].

7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.

MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].

0.25 [.010] C A B

e1 A

8X b A1

C

0.10 [.004]

e 1 D E

y b A A1

H K L

.189 .1497

0°

.013

.050 BASIC .0532 .0040

.2284 .0099 .016

.1968 .1574

8°

.020 .0688 .0098

.2440 .0196 .050

4.80 3.80 0.33 1.35 0.10

5.80 0.25 0.40 0°

1.27 BASIC 5.00 4.00 0.51 1.75 0.25

6.20 0.50 1.27

MIN MAX

MILLIMETERS INCHES

MIN MAX

DIM

8°

e

c .0075 .0098 0.19 0.25

.025 BASIC 0.635 BASIC 01-6014 01-3003 01 (MS-001AB)

8 Lead PDIP

(24)

01-6010 01-3002 03 (MS-001AC)

14 Lead PDIP

01-6019 01-3063 00 (MS-012AB)

14 Lead SOIC (narrow body)

1/10/2003

IR2109

Typical Connection

•

•

•

•

•

•

•

•

•

•

•

Description

Packages

V OFFSET 600V max.

I O +/- 120 mA / 250 mA

V OUT 10 - 20V

t on/off (typ.) 750 & 200 ns

Dead Time 540 ns

Product Summary

Symbol Definition Min. Max. Units

Absolute Maximum Ratings

Dynamic Electrical Characteristics

Symbol Definition Min. Typ. Max. Units Test Conditions

°

Symbol Definition Min. Max. Units

Static Electrical Characteristics

Symbol Definition Min. Typ. Max. Units Test Conditions

IR2109

IR21094

IR21094 IR21094S

Lead Assignments

Lead Definitions

Symbol Description

IR2109 IR2109S

8 Lead SOIC

8 Lead PDIP

14 Lead PDIP

14 Lead SOIC (narrow body)

V _OFFSET 600V max.