Ultra-Low-Power
Event-Driven Radio Design
Ultra-Low-Power Event-Driven Radio Design
Proefschrift
ter verkrijging van de graad van doctor aan de Technische Universiteit Delft,
op gezag van de Rector Magnificus prof. ir. K.C.A.M. Luyben, voorzitter van het College voor Promoties,
in het openbaar te verdedigen op dinsdag 18 maart 2014 om 12:30 Uur
door
Xiongchuan HUANG
elektrotechnische ingenieur geboren te Mianyang, Sichuan, China
Prof.dr.ir. J.R. Long
Samenstelling promotiecommissie:
Rector Magnificus, voorzitter
Prof.dr.ir. J.R. Long, Technische Universiteit Delft, promotor Prof.dr.ir. R.B. Staszewski, Technische Universiteit Delft Prof.dr.ir. B. Nauta, Universiteit Twente
Prof.dr.ir. P.G.M. Baltus, Technische Universiteit Eindhoven
Prof.dr.ir. C. Enz, Ecole Polytechnique Fédérale de Lausanne (Switzerland) Prof.dr.ir. P. Kinget, Columbia University (USA)
Dr.ir. G. Dolmans, imec – Holst Centre, adviseur
Prof.dr.ir. K.A.A. Makinwa, Technische Universiteit Delft, reservelid
Ultra-Low-Power Event-Driven Radio Design / by Xiongchuan Huang Technische Universiteit Delft
ISBN: 978-94-6203-557-7
Copyright © 2014 by Xiongchuan Huang
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means without the prior written permission from the copyright owner.
“Stay Hungry. Stay Foolish”
Summary
The emerging field of internet of things promises mankind an enhanced life quality, produc-tivity and security. One critical technology enabler is ubiquitous and unobtrusive wireless connectivity activated by ambient events and operated with little human intervention for con-figuration and maintenance. Commercial off-the-shelf radio devices cannot achieve the desired performance, reliability and ultra-low power consumption around 100µW at the same time. In this work, research is carried out on the design and implementation of an ultra-low-power radio for generic wireless event-driven applications including healthcare, information and enter-tainment, industrial and home automation, as well as environment monitoring.
To fulfill the stringent power budget, the envelope detection and the direct-modulation are the architectures of choice for receiver and transmitter front-ends, respectively. However, such radios suffer from poor sensitivity and frequency selectivity, and thus are unable to op-erate reliably across the desired link distance or in the presence of interference. This work investigated the root causes of insufficient sensitivity and selectivity in envelope detection receivers, and proposed design guidelines to optimize their performance. Furthermore, two novel envelope detection schemes have been proposed. The synchronized-switching tech-nique improves the sensitivity by suppressing DC offset and 1/f noise in the receiver, while the 2-tone signaling technique enables in-band interference rejection which was not possible in prior arts.
Prototype circuits have been built to verify the proposed techniques. On a 90nm CMOS technology, a transmitter and a receiver front-end are designed to benchmark the performance of 2-tone envelope detection in practice. The digital-IF, direct-modulation transmitter carries out the 2-tone IF-PSK modulation with -6dBm output power while consuming 893µW. The 2-tone envelope detection receiver realized up to 282 times improvement in interference re-jection while dissipating between 63.5µW and 121µW. A link budget of over 80dB is realized
by this transceiver pair, which translates to a link span up to 30 meters in indoor environ-ments and 100 meters outdoors.
By following a systematic approach, devising innovative architectures, and optimizing circuit performance, this work has confirmed the feasibility of ultra-low-power, autonomous and robust event-driven radios in low-cost and commercially available CMOS technologies.
Samenvatting
„Internet of things‟ is een opkomende markt waarvan een verhoogde kwaliteit van leven, productiviteit, en veiligheid te verwachten is. Een noodzakelijke technologie hiervoor is een alomtegenwoordig en onmerkbaar draadloos netwerk, dat geactiveerd wordt door naburige gebeurtenissen, en geringe menselijke interventie vereist voor zowel onderhoud als configuratie. Commercieel beschikbare radio‟s kunnen momenteel de gewenste doelstellingen voor betrouwbaarheid en ultra laag vermogensverbruik beneden 100 µW niet gelijktijdig realiseren. Dit proefschrift beschrijft het onderzoek uitgevoerd naar het ontwerp en realisatie van een radio met een ultra laag vermogensverbruik voor generieke draadloze asynchrone applicaties, zoals medische zorg, informatievoorziening en vermaak, industriële en huis automatisering, en kwaliteitsmonitoring van de omgeving.
Om het uitdagende vermogensbudget te realiseren, is gekozen voor een omhullende detector voor de ontvanger en een direct-modulatie architectuur voor de zender. Een nadeel van deze keuze is de mogelijke achteruitgang in gevoeligheid en selectiviteit, hetgeen kan betekenen dat betrouwbare communicatie over grotere afstanden, of in de aanwezigheid van stoorbronnen, niet mogelijk is. Dit proefschrift onderzoekt de oorzaken van verminderde gevoeligheid en selectiviteit in ontvangstarchitecturen gebaseerd op een omhullende detector, en stelt twee oplossingen ter verbetering voor. De synchroon-schakel techniek reduceert de gevoeligheid voor DC offset en 1/f ruis, door deze te onderdrukken in de ontvanger, terwijl de twee-toon techniek het onderdrukken van in-band storing mogelijk maakt. Beide oplossingen verhogen zowel de gevoeligheid als de selectiviteit van bestaande omhullende-detector gebaseerde systemen.
Prototype schakelingen zijn gerealiseerd om de voorgestelde oplossingen te verifiëren. Een zender en een ontvanger front-end zijn in 90nm CMOS technologie ontworpen om de twee-toon techniek te vergelijken met bestaande, commercieel beschikbare systemen. De
digitale-IF direct gemoduleerde zender bestaat uit een twee-toon IF-PSK signaal met een uitgangsvermogen van -6dBm en een vermogensverbruik van 893µW. De twee-toon omhullende detector ontvanger resulteert in 282 keer hogere selectiviteit met een vermogensverbruik tussen 63.5µW en 121µW. Met de zender - ontvanger combinatie is een link budget van meer dan 80dB mogelijk, hetgeen equivalent is aan een bereik van 30 meter in een huis omgeving en een bereik van 100 meter buitenshuis.
Door de systematisch aanpak, de vernieuwende architecturen en het optimaliseren van de circuits, bewijst dit proefschrift dat ultra laag vermogen, autonome en robuuste asynchrone radio‟s in een goedkope, commercieel beschikbare CMOS technologie mogelijk zijn.
Table of Contents
Summary ... i
Samenvatting... iii
Table of Contents ... v
List of Figures ... ix
List of Tables ... xiv
Chapter 1 Introduction ... 1 1.1 Event-Driven Radios ... 2 1.2 System Considerations ... 4 1.3 Radio Requirements ... 8 1.3.1 Power Consumption ... 8 1.3.2 Duty-Cycle ... 8 1.3.3 Data Rate ... 10 1.3.4 Range... 10
1.3.5 Carrier Frequency and Link Budget ... 11
1.3.6 Interference Rejection ... 12
1.3.7 Summary ... 13
1.4 State-of-the-Art Ultra-Low-Power Radios ... 13
1.5 Organization of This Thesis ... 16
Chapter 2 Ultra-Low-Power Transceiver Design in nm-CMOS ... 19
2.1 Radio Transceiver in nm-CMOS ... 19
2.1.3 Digital circuits ... 24
2.2 Low-Power Transceiver Architectures ... 25
2.2.1 Transmitter architectures ... 26
2.2.2 Receiver architectures ... 29
2.3 Summary ... 32
Chapter 3 Proof-of-Concept Circuits ... 33
3.1 A 2.4GHz Direct-modulation OOK Transmitter with Digital Pulse-shaping ... 33
3.1.1 Transmitter Architecture ... 33
3.1.2 Circuit Implementation ... 35
3.1.3 Evaluation Results ... 41
3.1.4 Summary ... 46
3.2 A 2.4GHz / 915MHz Wake-up Receiver Based on Synchronized-switching Envelope Detection ... 47 3.2.1 Receiver Architecture ... 47 3.2.2 Circuit Implementation ... 50 3.2.3 Evaluation Results ... 56 3.2.4 Summary ... 59 3.3 Conclusion ... 60
Chapter 4 Enhancement of the Envelope Detection Radio ... 63
4.1 Noise and Sensitivity of Envelope Detection Receivers ... 63
4.1.1 Nonlinear Noise Analysis ... 64
4.1.2 Sensitivity Optimization ... 72
4.1.3 Synchronized-Switching Technique ... 72
4.2 Selectivity of Envelope Detection Receivers ... 74
4.3 2-Tone Envelope Detection Scheme ... 75
4.4 Summary ... 78
Table of Contents
5.1 Architecture ... 79
5.1.1 2-Tone Carrier Generation ... 79
5.1.2 Digital-IF Transmitter ... 83
5.1.3 2-Tone IF-PSK Modulation ... 84
5.2 Front-End Circuit Design ... 87
5.2.1 Digitally-Controlled Oscillator ... 87
5.2.2 Digitally-Controlled Power Amplifier ... 89
5.2.3 LO Buffer ... 93
5.2.4 RF Swing to Digital Converter ... 94
5.2.5 LO Frequency Divider ... 95
5.3 System Implementation ... 96
5.3.1 LO Swing Calibration Loop ... 97
5.3.2 LO Frequency Calibration Loop ... 99
5.4 Evaluation Results ... 102
5.4.1 DCO performance and calibration ... 102
5.4.2 Power efficiency ... 105
5.4.3 Tx modulation ... 106
5.4.4 Power consumption analysis ... 109
5.5 Conclusions ... 110
Chapter 6 2-Tone Envelope Detection Receiver ... 113
6.1 Architecture ... 113
6.1.1 2-Tone Envelope Detection Receiver Front-End ... 113
6.1.2 2-Tone IF-PSK Demodulation ... 115
6.2 Front-End Circuit Design ... 118
6.2.1 Power-Efficient Multi-Stage LNA ... 118
6.2.2 Envelope Detector ... 124
6.2.5 Receiver Sensitivity Estimation ... 128
6.3 System Implementation ... 130
6.3.1 Digital Baseband in 2-tone Mode ... 131
6.3.2 Digital Baseband in OOK Mode ... 135
6.4 Evaluation Results ... 136
6.4.1 Input matching ... 136
6.4.2 Sensitivity ... 137
6.4.3 Interference rejection... 140
6.4.4 Power consumption analysis ... 142
6.5 Conclusion ... 143
Chapter 7 Conclusions and Recommendations ... 145
7.1 Summary ... 145
7.2 List of Contributions ... 146
7.3 Recommendations for Future Work ... 148
Bibliography ... 151
List of Publications ... 163
Acknowledgements ... 167
List of Figures
Figure 1-1: Wireless channel utilization of event-driven radio networks. ... 3
Figure 1-2: Wireless channel utilization of data-driven radio networks. ... 3
Figure 1-3: Typical block diagram of an event-driven wireless node. ... 5
Figure 1-4: Event-driven nodes responding to remote events wirelessly. ... 6
Figure 1-5: Block diagram of an event-driven node in reactive mode for wireless events. ... 7
Figure 1-6: State-of-the-art ultra-low-power transmitter survey. ... 14
Figure 1-7: State-of-the-art ultra-low-power receiver survey. ... 15
Figure 2-1: Simulated gm efficiency and fT of a minimum-length, nominal-VT NMOS transistor in a commercial 90nm CMOS technology... 20
Figure 2-2: Block diagram of direct-conversion Tx front-end [77]. ... 26
Figure 2-3: Block diagram of a direct-modulation (polar) Tx front-end [79]. ... 27
Figure 2-4: Block diagram of the direct-modulation OOK Tx in [40]. ... 28
Figure 2-5: Block diagram of zero-IF receiver front-end. ... 29
Figure 2-6: Block diagram of a super regenerative receiver front-end. ... 30
Figure 2-7: Block diagram of an envelope detection receiver. ... 31
Figure 3-1: Block diagram of the proof-of-concept transmitter... 34
Figure 3-2: Schematic of the integrated 2.4GHz VCO (a) and illustration of the tuning capacitance (b). ... 35
Figure 3-3: Illustrations of the 4-bit digitally-controlled PA. ... 38
Figure 3-4: Schematic of the complementary LO buffer. ... 40
Figure 3-5: Chip micrograph of the proof-of-concept transmitter. ... 41
Figure 3-6: Measured tuning range of the VCO. ... 41
Figure 3-7: Tx output signal level at different amplitude control codes. ... 42
Figure 3-9: Tx pulse-shaping digital logic and interface to the Tx front-end. ... 44
Figure 3-10: Measured Tx output of isolated OOK pulses at 3.125Mbps. ... 44
Figure 3-11: Measured Tx output spectrum of OOK pulses at 3.125Mbps. ... 45
Figure 3-12: Power breakdown of the Tx front-end when transmitting OOK signals. ... 46
Figure 3-13: Block diagram of the proof-of-concept receiver. ... 48
Figure 3-14: Illustration of synchronized-switching envelope detection. ... 49
Figure 3-15: Effect of synchronized-switching operation on receiver noise. ... 50
Figure 3-16: Schematic of the LNA and envelope detector (bias circuits not shown). ... 51
Figure 3-17: Input stage of the baseband amplifier. ... 52
Figure 3-18: Output stage of the baseband amplifier. ... 53
Figure 3-19: Schematic of the output chopper. ... 54
Figure 3-20: Block diagram of the clock generation module. ... 55
Figure 3-21: Chip micrograph of the proof-of-concept receiver. ... 56
Figure 3-22: Measured output signal level and noise floor for a 915MHz receiver. ... 57
Figure 3-23: Measured output SNR for different carrier and data rate settings. ... 58
Figure 3-24: Measured frequency selectivity of the receiver in (a) 915MHz and (b) 2.4GHz configurations. ... 58
Figure 3-25: Power breakdown of the Rx front-end. ... 59
Figure 4-1: Block diagram of a generic envelope detection receiver front-end. ... 64
Figure 4-2: Illustration of noise spectral distribution during envelope detection. ... 67
Figure 4-3: Rx sensitivity at 10kbps with different noise figure (NF) and RF bandwidth when limited by RF stage noise. ... 68
Figure 4-4: Typical power spectrum of the input-referred noise in baseband circuits. ... 70
Figure 4-5: Rx sensitivity at different flicker noise corner frequency when RF noise is insignificant... 71
Figure 4-6: Modeling of a synchronized-switching envelope detection receiver. ... 73
Figure 4-7: Simplified illustration of envelope detector frequency response. ... 75
List of Figures
Figure 4-9: Interferers affecting the desired signal in 2-tone envelope detection. ... 77
Figure 5-1: Generating a 2-tone signal by adding 2 single-tone carriers. ... 80
Figure 5-2: Generating 2-tone signals by 2-step upconversion. ... 80
Figure 5-3: Constraints of Tx RF local oscillator performance. ... 82
Figure 5-4: Block diagram of the digital-IF transmitter for 2-tone modulation. ... 83
Figure 5-5: Modulating IF amplitude in the transmitter. ... 85
Figure 5-6: Modulating IF frequency in the transmitter. ... 85
Figure 5-7: Modulating IF phase in the transmitter. ... 85
Figure 5-8: Illustration of the IF-PSK 2-tone modulation in the digital-IF transmitter. ... 86
Figure 5-9: Schematic of the RF DCO and its tuning capacitors. ... 88
Figure 5-10: Block diagram and schematic of the PA. ... 91
Figure 5-11: Output matching network of the PA (single-ended equivalent). ... 92
Figure 5-12: Schematic of the LO buffer. ... 93
Figure 5-13: Block diagram of the RF swing to digital converter. ... 94
Figure 5-14: Swing detector at PA input. ... 95
Figure 5-15: Dynamic LO frequency divider... 96
Figure 5-16: Chip micrograph of the 2-tone event-driven transmitter. ... 97
Figure 5-17: Block diagram of the LO swing calibration loop. ... 98
Figure 5-18: Flow chart of the LO swing calibration algorithm. ... 99
Figure 5-19: Block diagram of the carrier frequency calibration loop. ... 100
Figure 5-20: Timing diagram of the LO frequency calibration loop. ... 100
Figure 5-21: Frequency error due to counter operation. ... 101
Figure 5-22: Measured DCO frequency tuning range. ... 103
Figure 5-23: Measured DCO phase noise at different output frequencies. ... 103
Figure 5-24: Measured output of the RF swing to digital converter with DCO bias level swept in 4 test chips. ... 104
Figure 5-25: Measured global power efficiency at different output levels (differential / single-ended). ... 106
Figure 5-26: 2-tone output signal waveform with 8MHz tone spacing around 916MHz. ... 107
Figure 5-27: 2-tone output signal spectrum with 8MHz tone spacing around 916MHz. ... 108
Figure 5-28: 10Mbps OOK output waveform at 916MHz. ... 108
Figure 5-29: 10Mbps BPSK output waveform at 916MHz. ... 109
Figure 5-30: Power consumption breakdown of the Tx front-end at -6dBm output level (single-ended output). ... 110
Figure 5-31: Comparison to state-of-the-art ultra-low-power transmitters. ... 111
Figure 6-1: Architecture of the proposed 2-tone envelope detection receiver. ... 114
Figure 6-2: Illustration of the downconversion steps in the receiver. ... 116
Figure 6-3: Quadrature analog baseband for PSK signals. ... 116
Figure 6-4: Single-phase analog baseband using low-IF and digital downconversion. ... 117
Figure 6-5: Block diagram of the programmable RF front-end. ... 119
Figure 6-6: Schematic of a single LNA stage. ... 120
Figure 6-7: Simulated gain of an amplifier unit at different bias currents for the active inductor. ... 123
Figure 6-8: Schematic of the envelope detector (5 detector circuits in parallel with individual enable lines). ... 125
Figure 6-9: Schematic of the IF AMP. ... 126
Figure 6-10: Block diagram of the IF mixer and BB PGA. ... 127
Figure 6-11: Block diagram of the 8-bit SAR ADC [115]. ... 128
Figure 6-12: Chip micrograph of the 2-tone event-driven receiver front-end. ... 131
Figure 6-13: Block diagram of the Rx digital baseband for 2-tone IF-PSK reception. ... 132
Figure 6-14: Block diagram of the decimation and RSSI estimation module in 2-tone mode. ... 133
Figure 6-15: Snapshot Delay / RSSI estimation in 2-tone mode. ... 134
Figure 6-16: Non-coherent DBPSK demodulator in the Rx DBB. ... 135
Figure 6-17: Block diagram of Rx digital baseband in OOK mode. ... 135
List of Figures
Figure 6-19: Measured input return loss under different settings. ... 137 Figure 6-20: Comparison of measured, predicted and simulated sensitivity at 10kbps. ... 139 Figure 6-21: Measured interference tolerance at different LNA gain settings (10kbps data rate). ... 141 Figure 6-22: Power consumption breakdown of the Rx front-end with 4-stage cascaded LNA (excluding IF LO and DBB). ... 142 Figure 6-23: Comparison to state-of-the-art ultra-low-power receivers. ... 143
Table 1-1: Specifications of a typical event-driven radio ... 13
Table 3-1: Comparison to the state-of-the-art low-power OOK transmitters. ... 46
Table 3-2: State-of-the-art low-power OOK receiver comparison. ... 60
Table 5-1: Generation of two 7-bit thermometer-coded IFT+/-. ... 90
Table 6-1: Simulated front-end parameters at 10kbps ... 129
Table 6-2: Sensitivity prediction for synchronized-switching OOK reception (without SAW preselect filter loss). ... 129
Table 6-3: 2-tone baseband parameters for different data rate. ... 132
Table 6-4: Measured sensitivity and power consumption at different data rates. ... 138
Table 6-5: Measured in-band interference tolerance at different RF signal paths (10kbps data rate) ... 140
Chapter 1
Introduction
As the information and communication technology (ICT) has expanded rapidly in recent years, tens, or perhaps hundreds of new devices and applications have changed our daily lives. Apart from expanding functionality and enhancing performance of the devices, more and more emphasis is placed on the energy efficiency. This is driven not only by a large number of mo-bile devices with limited battery power, but also a result of our awareness that the primary energy reserves on our planet are non-renewable. For battery-powered wireless devices, maintaining wireless connectivity is one of the most power-hungry operations. To address this problem, new industrial standards have been defined, focusing on low-power wireless con-nectivity applications. For example, the Bluetooth™ and Zigbee™ radios feature low data rates, short link distances, and low-complexity modulation schemes, all of which allow low power implementations. In addition, many proprietary ultra-low-power (ULP), short-range radio products (e.g.,[1]–[4]) have populated various market sectors, including consumer, in-dustrial, security and healthcare. Among different applications, the requirements in perfor-mance, power consumption, cost and reliability vary significantly. In order to achieve ener-gy-efficiency in wireless links, it is of critical importance to customize the device based on the characteristics of the targeted application.
Generally, two main categories of radio applications can be identified based on their us-age and operation patterns. The first one is the data-driven application, which strives to ex-change a large amount of data continuously at a high throughput. The other category is the event-driven application, which reacts to ambient events by transmitting, receiving and re-laying information only when certain events occur. Traditionally, industry and academia have
focused on data-driven applications, while event-driven applications just started to emerge as a result of recent technology developments. Consequently, few radios are optimized for event-driven applications so far.
This work is dedicated to ultra-low-power radio design for event-driven applications. In this chapter, the characteristics of event-driven applications are introduced, and their system level requirements are identified. The specifications of typical event-driven radio transmitters (Tx) and receivers (Rx) are then derived. State-of-the-art ULP radios are also surveyed. At the end of this chapter, the organization of the thesis is described.
1.1 Event-Driven Radios
An event-driven radio responds to ambient events and shares information about the events. Typically, the communication between radios is unscheduled. On the other hand, the event information needs to be delivered in a timely manner, so that subsequent processing of the information can be carried out immediately. Wireless healthcare monitoring and alert systems [5]–[7] are examples where the event-driven radio is an enabling technology. Such systems monitor the condition of patients and send out an alarm signal if an emergency condition (e.g., cardiac arrest or epileptic episode) is detected. The occurrence of such critical events cannot be predicted in a given time interval. It could happen at any moment, or it might not happen at all. However, the event-driven radio must remain responsive all the times, so that an alert can be received and relayed to appropriate personnel and medical institutes once it is triggered with minimum delay.
In most cases, the amount of information relayed in event-driven communication is small since it only needs to indicate the type of the event and describe when, where and how it happened. As a result, event-driven radios do not need to transmit or receive a large amount of data for an extended period of time. Wake-up receivers (WuRx) in wireless sensor net-works (WSN) are another example of event-driven radios [8]. The WuRx monitors the wire-less channel, so that a main radio is activated for data communication when a wake-up
bea-Chapter 1 Introduction
con is detected. The wake-up beacon for the WuRx only needs to contain a predefined binary pattern together with several bits of address information [8].
Figure 1-1 illustrates the typical channel utilization of event-driven radios. The wireless channel is unoccupied for most of the time. The interval between wireless activities is irregu-lar and the duration of the activities is short. The control overhead, which is the energy and time spent in establishing and controlling the communication (including timing synchroniza-tion and acknowledgement) should be minimized in order to reduce energy waste and time delay. This is contrasted with the wireless activity of typical data-driven radios illustrated in Figure 1-2. In a data-driven network, large amounts of data are exchanged in densely allo-cated timeslots, resulting in a congested wireless medium. Due to the longer duration of data exchanges, it is less problematic if the control overhead is not optimized in data-driven net-works.
Figure 1-1: Wireless channel utilization of event-driven radio networks.
Figure 1-2: Wireless channel utilization of data-driven radio networks.
Conventional data-driven radios are not optimized for event-driven applications. This work focuses on the design, implementation, and optimization of event-driven radios. It starts by identifying the system level aspects of event-driven applications in the next section.
1.2 System Considerations
Due to the broad range of applications, the requirements of an event-driven wireless device have to be defined on a case-by-case basis. Nevertheless, some common features of event-driven applications can be summarized. This section will focus on these common fea-tures and consider the trade-offs among power consumption, system cost and functionality for a generic wireless event-driven node.
Typically, event-driven networks are deployed with limited source of energy. For exam-ple, in wireless healthcare monitoring applications, body sensors need to be small and light-weight, as they are attached to the patients‟ body and are often worn for a long time. Despite of advances in battery technology, the energy available to power the devices is ex-pected to shrink due to the diminishing form factor of the batteries in miniaturized nodes [9]. On the other hand, long operation lifetime is preferred, since frequent battery replacement or recharging is inconvenient for the patients. Another example is in environmental monitoring applications. In such applications, ambient data, e.g., temperature, humidity and vibration, are sensed and processed to detect natural disasters such as a wildfire or a volcanic eruption [10]–[12]. Also, large quantities of sensor nodes need to be deployed over wide areas with reasonable cost. These systems are expected to be in service for years, while there is no prac-tical way to replace the batteries in each node. Therefore, the power consumption needs to be optimized to maximize the battery lifetime or the battery must be supplemented by energy harvested from other sources.
Another important aspect is the system cost, which should be calculated not only for the initial hardware cost but also for deployment and maintenance. In terms of hardware cost, the event-driven nodes should be as compact as possible, with few discrete components and little dependency on expensive devices and technologies. The electronics in the device should therefore be integrated as much as possible using conventional technologies, for example in complementary metal–oxide-semiconductor (CMOS) technologies. To reduce the deployment and maintenance costs, the systems need to be autonomous, i.e., requiring minimum human
Chapter 1 Introduction
intervention. Frequent reconfiguration and calibration, as well as battery replacement or re-charging should be avoided since they inevitably increase the maintenance cost.
The functional aspect of event-driven devices is application dependent. Just as in many wireless sensor network applications, sensing and communication are indispensible functions for an event-driven node. In addition, signal processing capability is also required to process the ambient data and detect event occurrences. All of these functionalities should be support-ed by the power management module, which regulates the energy from batteries and/or ener-gy harvesters and supplies it to other modules. A system controller oversees the operation of the other modules and serves as the interface to upper functional layers.
Figure 1-3: Typical block diagram of an event-driven wireless node.
Figure 1-3 shows a typical block diagram of an event-driven wireless node. In order to reduce hardware cost, most of the functionalities should be integrated into a single device
[13]–[17]. Modern CMOS technologies are especially suitable for this task, thanks to their low cost (in volume production) and versatility for mixed-signal functionalities. Both sys-tem-on-a-chip (SoC) and system-in-a-package (SiP) technologies should be considered, since they feature different trade-offs between cost, reliability, performance and time to market [18]–[20]. Functional modules which are difficult or impossible to integrate at present, e.g., many sensors, batteries and energy harvesters, may be integrated in the future as circuit or packaging technology evolves.
Beside radios, other devices such as ultrasound [21] and infrared [22] transceivers have also been reported for wireless communications. However, these devices are not as versatile as radio transceivers, due to the dependence on the media or constraint of line-of-sight (LOS) wireless links. To support a wide range of event-driven applications, this thesis adopts radio transceivers as the communication devices.
Chapter 1 Introduction
As the energy available for an event-driven device is limited, the functional blocks in Figure 1-3 should be switched off whenever possible to reduce power consumption and pro-long operation lifetime. To maintain responsiveness to ambient events, however, certain func-tionalities should be kept active while the rest of the system is asleep. For example, to remain responsive to local events triggered by the sensors, the sensor and interface circuits need to be active, together with a small portion of the digital signal processing (DSP) module which de-tects events based on sensor data. More challenging, is the need to remain responsive to re-mote events via the wireless channel. This occurs in applications where information about remote events must be relayed via a mesh of distributed event-driven nodes. Figure 1-4 illus-trates such a scenario. To deliver the event information in a timely manner, all nodes in the event-driven network must be responsive to relay requests from the wireless channel. There-fore, the radio, the event detection routine in the DSP and the necessary power management should remain functional, while other modules can be switched off to save power as shown in Figure 1-5.
The trade-off between power, cost and functionality at the system level does constrain the design choices made for individual blocks in an event-driven node. However, it will be shown in the next section that the trade-off becomes more pronounced when it comes to the event-driven radio design.
1.3 Radio Requirements
This section is devoted to the analysis of the specifications of a typical event-driven radio. Various parameters for the transceiver design, such as power consumption, link budget and data rate, are derived and summarized.
1.3.1 Power Consumption
The power budget for the event-driven radio varies considerably, depending on the available energy sources and desired operation lifetime. In [23] and [24], state-of-the-art battery and energy harvesting technologies have been investigated. Small sized / weight and low cost en-ergy sources are mandatory due to the cost constraint. Under such constraints, 100μW is chosen as the system power budget, which allows approximately 1-year operation lifetime with a single coin battery [23]. Similar amount of energy can be also provided by commer-cially-available energy harvesters, such as a 1cm2 solar cell under indoor lighting conditions [24], [25].
Although other modules in an event-driven node consume power, their duty-cycle varies depending on the applications. Recent advances in circuit and system techniques make it pos-sible to make their power consumption negligible in many applications [26], [27]. Similar to [23], it is assumed that the 100μW power budget can be completely allocated to the event-driven radio in this work.
1.3.2 Duty-Cycle
Duty-cycling can be applied to radios to reduce the average power consumption. The trans-ceivers are switched off whenever possible, so their power consumption is reduced to the
Chapter 1 Introduction
leakage level, which can be lower than 1μW. Several wake-up schemes are proposed to switch on the transceivers only when necessary so that communication can be maintained with reduced average power consumption [28], [29].
In event-driven applications, duty-cycling the radio might be a viable solution because the amount of data transferred is small and the communication is infrequent. However, there is also a trade-off between the average power consumption and network latency [8], [30], [31]. In applications where the latency is critical, it is difficult to achieve the required latency with heavily duty-cycled radios [30]. In such cases, the event-driven radio receiver needs to always be activated to monitor the wireless channel and respond to remote events immedi-ately.
The duty-cycle constraint applies differently to the transmitters. Despite the latency re-quirement, the transmitter can always be duty-cycled as long as its start-up is fast enough. It is enabled only when data is ready to send. Therefore, in many cases the transmitter can be designed to operate at higher peak power to benefit from duty-cycled operation. On the other hand, as the receiver might already consume the majority of the power budget, the average power consumption of the transmitter must be kept negligible compared to 100µW. Assuming the average power consumption of 10µW and a duty-cycle of 1%, the peak power consump-tion of the transmitter needs to be lower than 1mW. In addiconsump-tion, the start-up time of the transmitter should be much shorter than the typical packet length transmitted, to minimize energy waste during start-up.
To summarize, the event-driven radio receiver should be able to operate continuously with 100μW active power consumption in order to support some low-latency applications, while the transmitter can be designed with up to 1mW peak power consumption with ty-cycle below 1%. At the system level, it should be straightforward to ensure low du-ty-cycling transmission given the small amount of data and infrequent occurrence of events. In applications with relaxed latency requirement, the receiver can also be duty-cycled, and the resulting average power consumption further reduced.
1.3.3 Data Rate
In event-driven applications, the relatively low data rate can be exploited to achieve low power consumption in the transceiver [8], [23], [28]. An investigation carried out in [23] indicates that the average data rate of the transceivers in similar applications is lower than 1 kbps. Given such a low data rate, event-driven radios can adopt less complex modulation schemes and trans-ceiver architectures, and can also benefit from relaxed specifications in the circuit blocks.
While the average data rate can be very low, the instantaneous data rate of the radio again has an impact on the network latency. The receiver needs to capture a packet of certain length to trigger subsequent operations, for example, relaying the data or activating other functional modules. For an event-driven radio with 100kbps data rate, a short payload of 50 bits together with 100% protocol overhead (e.g., preamble, synchronization header and address code) can be received in 1ms if the receiver is always on. This very short response time should be suffi-cient in most event-driven applications. In applications without strict latency requirements, the data rate of the radio can be further reduced, or the receiver can operate in a duty-cycled mode to decrease power consumption further.
In order to serve different application scenarios, this work aims to achieve data rates that are scalable between 1kbps and 100kbps at different power levels.
1.3.4 Range
The useful range of link span in event-driven applications is between 5 meters and 30 meters in indoor environments, and up to 100 meters outdoors. With such a range, the radios are able to communicate across 2 to 3 rooms in a typical residential building [32], and also cover moderate sized warehouses, supermarkets and factory buildings. When it comes to outdoor applications, such as environment monitoring for agriculture [33], [34] and natural disasters [10]–[12], the end-to-end distance may exceed 100 meters. As the path loss of a radio signal scales with distance raised to a power between 2 and 4, it is more efficient to implement mul-ti-hop communication to cover large distances [27]. Multitudes of event-driven nodes can be distributed, so that information may be shared between any particular nodes in a large field
Chapter 1 Introduction
using relaying hops between multiple modes [35], [36]. The scenario of a multi-hop relay in an event-driven application is illustrated in Figure 1-4, where data from the remote event are relayed to an aggregation node beyond the range of a single event-driven node.
1.3.5 Carrier Frequency and Link Budget
Multiple factors influence the choice of carrier frequency. Firstly, the path loss of a radio sig-nal increases as the carrier frequency increases. The path loss (Ls) and distance (d) are related
by: 2 2 1 1 , 4 4 S n n c L f d d (1.1)
where λ is the wavelength of the carrier, f is the carrier frequency, and c is the speed of light. The exponent n is an empirical factor between 2 and 4. To relax the link budget of the trans-ceiver, it is therefore better to choose a lower carrier frequency. From a circuit design point of view, lower operating frequency of the front-end circuit also helps to reduce the power con-sumption of the circuits [23].
On the other hand, the size of the electrical and electromagnetic components such as an-tennas and inductors increases proportionally as the frequency decreases. To reduce the size of the event-driven node and achieve low deployment cost, a higher carrier frequency is de-sired so that small-sized antenna and integrated inductors can be used.
Another important consideration is the bandwidth available in the chosen frequency band. Many data-driven applications are moving to higher frequency bands for large available bandwidth. In event-driven applications, however, the data rate is relatively low, i.e., up to 100 kbps. This implies that the bandwidth occupied by the transmitted signal is in the range of hundreds of kilohertz, which is available in most of the unlicensed (i.e. the industrial, sci-entific and medical, ISM) frequency bands.
To reduce size and cost while maintain a reasonable link budget for the event-driven ra-dio, this work proposes to utilize the sub-GHz carrier frequencies from 780MHz to 950MHz. At such frequencies, a low-cost, surface mounted antenna shorter than 1cm is available [37],
while the free-space path loss (FSPL) for a 100-meter span is around 72 dB. In a practical indoor environment, the path loss ranges from 57 to 80 dB for distances between 5 and 30 meters [38].
The link budget of up to 80dB needs to be provided by the event-driven radio. As ana-lyzed in section 1.3.2, the receiver is facing the most stringent power constraint, as its power budget is 100μW. The transmitter can spend 1mW peak power thanks to duty-cycling. As-suming that the overall power efficiency of the transmitter is 20%, then only 0.2mW (-7dBm) is radiated from the transmitter. Consequently, the Rx sensitivity needs to be -87dBm. If the transmitter efficiency can be improved, the sensitivity of the receiver can be relaxed to the same degree.
1.3.6 Interference Rejection
Like other radios, the event-driven radio also suffers from interference. The homogeneous interference, i.e., the interference from other event-driven radios in the same network, is less problematic, because the data exchange is infrequent and the channel utilization is low, as shown in Figure 1-1. On the other hand, the heterogeneous interference cannot be ignored, since other radio devices in close proximity might also operate in the same frequency band at the same time. This is especially true in unlicensed frequency bands, which are populated by devices and systems from different manufacturers. While most state-of-the-art ul-tra-low-power receivers are able to reject out-of-band interference via front-end filtering [8], [39], [40], little suppression has been achieved for in-band interference. This work aims at more practical scenarios, where the event-driven radio operates in unlicensed frequency bands with in-band interference. The radio must be resilient to both in-band and out-of-band interferers to ensure proper operation of the event-driven network. The extent of interference suppression which can be achieved by the receiver remains an open question here, and will be discussed later in this thesis.
Chapter 1 Introduction
1.3.7 Summary
The requirements a typical event-driven radio are summarized in Table 1-1. It will be shown in the next section that it is very challenging to design a transceiver with 80dB link budget within 100μW that is still resilient to in-band interferers.
Table 1-1: Specifications of a typical event-driven radio
Carrier frequency
Sub-GHz unlicensed bands (780 / 868 / 915 / 950MHz)
Data rate 1kbps to 100kbps
Range 100m (free-space) / 30m (indoor)
Link budget 80dB
TX output power (POUT) Less than 0dBm
RX sensitivity (PMDS) Better than -80dBm (POUT – 80dB)
Interference rejection
Resilient to both in-band and out-of-band interferers
Power consumption 100μW (Rx) / 1mW (Tx)
1.4 State-of-the-Art Ultra-Low-Power Radios
Recently there have been many publications in the field of ultra-low-power radio design. Many of them are placed in similar contexts, for example wireless sensor networks [23], [41], wake-up receivers [8], and wireless body-area networks [42]. Their performance is compared with the requirements of the event-driven radio listed in Table 1-1.
Figure 1-6 shows recently published ultra-low-power transmitters. They all adopt on/off keying (OOK) or frequency shift keying (FSK) as the modulation schemes to simplify the front-end circuitry and reduce power consumption. The low spectral efficiency of these two modulation schemes is not an issue due to low data rate in event-driven applications. The di-rect-modulation architecture is often adopted, which can achieve high overall power
effi-ciency for the transmitters. The power effieffi-ciency of the transmitters shown in Figure 1-6 is mostly between 10% and 40%. Compared to FSK transmitters, OOK transmitters can achieve better power efficiency as the modulation is applied conveniently by switching on and off the power amplifier (PA), or the transmitter as a whole.
Figure 1-6: State-of-the-art ultra-low-power transmitter survey.
Figure 1-7 plots the performance and power consumption of recent ultra-low-power re-ceivers. Again, OOK and FSK are often adopted for low complexity and consumption. Most of the ULP OOK receivers adopt envelope detection principle to detect the RF signal without the need of a local oscillator (LO). On the other hand, since the baseband information is mapped to the instantaneous frequency of the carrier in FSK modulation, FSK receivers re-quire an accurate LO signal to downconvert the received RF signal. As a result, it is difficult to design an FSK receiver with the power budget of 100μW, which is already achieved by OOK receivers [43], [44]. In [45], a MICS-band FSK receiver achieves -90dBm sensitivity
[51] 330kbps [50]50kbps [49] 40kbps [39] 1Mbps [39] 1Mbps [83]50kbps [83]50kbps [116] 20kbps [78] 45kbps
Chapter 1 Introduction
with 120µW power consumption. However, the frequency multiplying technique in [45] is not suitable for radios operating at higher frequencies, i.e., around 1GHz or above.
Figure 1-7: State-of-the-art ultra-low-power receiver survey.
The ultra-low-power transceivers surveyed in this section typically achieve data rates around 100kbps, which is suitable for event-driven applications. For radios with higher data rates, their sensitivity can be improved by reducing the data rate. However, data rate cannot be easily traded for power consumption, as when the radio is duty-cycled, there is always synchronization overhead [28] which prevents the power dissipation from scaling linearly with the data rate. As proposed in section 1.3.2, an event-driven receiver may need to monitor the channel continuously for remote events. In such a case, the power consumption of a re-ceiver cannot be reduced even if lower data rate is required.
The forgoing observation is also applicable to ultra-wideband (UWB) radios [46]–[48]. These radios achieve very low energy-per-bit (i.e., below 1nJ/bit) thanks to their extremely low duty-cycled operations. They are well-suited for short-range and low-power data-driven
[39] 1Mbps [39] 1Mbps [78] 45kbps [116] 20kbps [83] 50kbps [40] 5kbps [43] 200kbps [44] 200kbps [45] 200kbps [120] 250kbps
applications. On the other hand, prior to achieving synchronization with a transmitter, a UWB receiver needs to listen to the channel continuously. In [47], although the receiver consumes only 750µW when receiving 2Mbps data, it dissipates as much as 11.56mW when searching for incoming signals. In addition, UWB transceivers typically operate at frequencies above 3GHz, which results in higher path loss and smaller communication distance compared to narrowband radios with carrier frequencies around 1GHz. Therefore, it can be concluded that UWB radios may not be suitable for generic event-driven applications where the radio needs to monitor the wireless channel continuously with 100µW power budget.
Further investigation of the reported transceivers reveals the importance of passive com-ponents in ultra-low-power radios. Micromachined bulk acoustic wave (BAW) resonators are used in [40], [43], [44], [49]–[51]. In a transmitter, the resonator serves as the resonant tank for the carrier source. Thanks to the short-term stability of the BAW resonators, there is no need for a phase or frequency locked loop in the transmitter. In the receivers, the resonator is used as a high-Q RF bandpass filter to reject out-of-band interference.
Nonetheless, BAW resonators are not yet available for use in the unlicensed frequency bands, and integration of the micromachined BAW resonators and CMOS chips is still not cost effective. Due to the limits of cost and frequency band for event-driven applications, this work aims at radio front-ends without high-Q BAW resonators.
Another challenge is the performance of the event-driven receiver. Better than -80dBm sensitivity is required, which has not been reported with power consumption below 100μW. In addition, in-band interference rejection seems impossible in envelope detection receivers. In this work, novel circuit and system techniques have to be proposed and implemented to address these challenges within the ultra-low power budget.
1.5 Organization of This Thesis
This work has taken a systematic approach to address the challenges in event-driven radio design. Chapter 2 starts with the investigation of possible radio architectures and the analysis
Chapter 1 Introduction
of the advantages and drawbacks. It then identifies the most suitable transmitter and receiver architectures for ULP event-driven radios.
To justify the proposal from Chapter 2, two proof-of-concept designs are presented in Chapter 3: a 2.4GHz direct-modulation transmitter front-end consuming less than 4mW, and a 2.4GHz / 915MHz envelope detection receiver with 51μW power consumption.
In Chapter 4, the critical circuit blocks in this work are analyzed mathematically, offering insight from circuit design perspective. Furthermore, techniques to improve the performance are proposed, which are tailored for ultra-low-power operation in event-driven applications.
Based on the proposed techniques, the event-driven transmitter and receiver are present-ed in Chapter 5 and Chapter 6, respectively. The system architecture is presentpresent-ed, followpresent-ed by implementation details. Measurement results are shown to prove the performance and func-tionality of the radio.
Finally, Chapter 7 concludes the thesis by highlighting its contributions and discusses di-rections for future work.
Chapter 2
Ultra-Low-Power
Transceiver Design in nm-CMOS
This chapter identifies the design scope of the event-driven radio and investigates the strategies to tackle challenges. The characteristics of modern CMOS technologies are analyzed, focusing not only on active transistors, but also on passive components and logic gates. Next, the low-power radio architectures are surveyed. At the end of this chapter, the low-power tech-niques and architecture considerations are summarized.
2.1 Radio Transceiver in nm-CMOS
Due to cost and integration considerations, event-driven radios should be implemented in modern CMOS technologies. As the technology continuous to scale in the nanometer range, the performance of both active transistors and passive devices keeps improving, although at different paces. To see how the nanometer CMOS (nm-CMOS) technologies benefit the event-driven radio design, the characteristics of the devices are analyzed in the following sec-tions.
2.1.1 Active transistors
High performance MOS transistors are provided in nm-CMOS technologies with different flavors, such as different threshold voltages (VTH), different leakage levels, as well as different
voltage ratings. With proper choice of devices and biasing points, these transistors can deliver sufficient performance for event-driven radios while dissipating low power.
As the technology evolves, the speed of transistors increases. In a commercial 90nm CMOS technology, the intrinsic (i.e., neglect parasitic effects from interconnection) transit frequency (fT) of minimal-length NMOS transistors can be higher than 100GHz, which is 2
order of magnitude higher than the operating frequency of the event-driven radio in this work. To leverage the relatively lower operating frequency, the active transistors do not need to be biased in strong inversion where maximum fT and fmax are obtained, but in moderate or weak
inversion with lower current density to reduce power consumption [52].
Figure 2-1 shows the simulation result of the fT of a nominal-VTH NMOS transistor with
minimum channel length. The gate-source voltage (VGS) is swept to adjust the drain current
ID, while the drain-source voltage (VDS) is fixed at 1.2V so the transistor stays in the
satura-tion region (i.e., VDS > VGS – VTH). The x-axis is the inversion coefficient (IC), which is
de-fined as [53]:
2 2 D ox T I IC C V W L . (2.1)In (2.1), μ is the mobility of the carrier, in this case (i.e., NMOS) the electrons, Cox is the oxide
capacitance per unit gate area, ID is the drain current, and W and L are the gate width and length,
respectively. The thermal voltage VT is approximately 26mV at the room temperature.
Figure 2-1: Simulated gm efficiency and fT of a minimum-length, nominal-VT NMOS transis-tor in a commercial 90nm CMOS technology
Chapter 2 Ultra-Low-Power Transceiver Design in nm-CMOS
When the inversion coefficient is much smaller than 1, i.e., the NMOS is biased in weak inversion [53], the fT is below 1GHz and it increases linearly on a logarithmic scale as the
drain current increases. The trend remains throughout the weak and moderate inversion re-gions (IC ≈ 1). In the strong inversion region (IC >> 1), fT becomes higher than 100GHz at
IC > 30, and then it starts to flatten out due to the velocity saturation and mobility reduction effects.
Figure 2-1 also shows the transconductance efficiency of the transistor as a function of the inversion coefficient. The transconductance (gm) of a MOS transistor is defined as
, D m GS I g V (2.2)
and the gm efficiency is the ratio between gm and ID, which describes how much
transcon-ductance can be realized per certain current consumption. Higher gm efficiency implies better
power efficiency of the circuit. From Figure 2-1, the maximum gm efficiency of 28S/A is
achieved in the weak-inversion region. When the bias current increases, the gm efficiency
de-creases gradually. In strong inversion, the efficiency is below 10S/A.
For ultra-low-power event-driven radio design, the transconductance efficiency is very important since a higher efficiency can reduce the current consumption. In the 90nm CMOS, the NMOS fT is above 10GHz in moderate inversion, which is 10 times higher than the carrier
frequency in this work. Therefore, subthreshold or moderate-inversion operation can be ex-ploited to minimize the current consumption with sufficient speed [52], [54]. In [55], a 1.9GHz digitally-controlled oscillator (DCO) exploiting subthreshold operations achives 100µW power consumption under 0.5V supply,.
Another important feature of the nm-CMOS technologies is the reduced supply voltage. In the 90nm CMOS technology, the core supply voltage (VDD) is typically 1.2V. This is to be
contrasted to older technology nodes such as 0.18μm CMOS, which requires 1.8V VDD. On
the other hand, the reduction of threshold voltage in MOS transistors is less aggressive due to leakage concerns [56]. As a result, the available voltage swing in analog circuits diminishes, making it difficult to maintain the dynamic range and signal-to-noise ratio (SNR) in the ana-log front-end. Nevertheless, for event-driven radios, the power level in the circuits is much
lower than the technology limitation. For example, assuming -7dBm (0.2mW) output power from the transmitter, the peak-to-peak voltage swing across 50Ω impedance is approximately 0.28V. Meanwhile, the low supply voltage can be utilized with proper design techniques to achieve low power consumption.
In analog baseband, the mismatch between transistors degrades circuit performance such as DC offset, common-mode rejection and immunity to supply / ground noise. As the tech-nology scales down, the matching of transistors improves. The mismatch in MOS transistors is dominated by the threshold voltage difference ΔVT, which has a normal distribution with
zero mean and variance depending on the device area [57]:
2 2 VT T A V W L , (2.3)where AVT is a technology-dependent parameter, W and L are the transistor gate length and
width, respectively. AVT reduces as the technology scales down [57], [58]. For example, from
2.5µm to 0.18µm CMOS technologies, AVT scales from 30mV·µm to below 5mV·µm [57].
For transistors of a given size, the threshold mismatch reduces by a factor of 6 in a 0.18µm technology compared to a 2.5µm technology. On the other hand, the reduction of AVT is not
as fast as the reduction of the feature size [59], [60]. Therefore, for minimal-sized devices, the threshold mismatch is worse in newer technologies. However, in analog baseband circuits, minimum-sized transistors are seldom used in radio front-end circuits. In RF front-end cir-cuits where minimum-sized transistors are often used, mismatch performance is less critical.
The thermal noise performance of a transistor improves as the technology node scales down [60]. The minimal noise figure (NFmin) reduces from 0.4dB to 0.2dB as the technolo-gy scales from 0.25µm to below 100nm as a result of the improved device speed. However, in low-power and low data rate radios such as the event-driven radios, 1/f noise becomes a serious problem as it corrupts the baseband signal at low frequencies. For nm-CMOS tech-nologies, the 1/f corner frequency for the minimum-sized transistors can reach 10MHz or above [61], while the data rate of event-driven radios is below 100kbps. Although the tran-sistors can be scaled up to reduce 1/f noise level, attention still needs to be paid during the ra-dio design.
Chapter 2 Ultra-Low-Power Transceiver Design in nm-CMOS
2.1.2 Passive devices
In CMOS technologies, various passive components are available, including resistors, capac-itors, inductors and transformers, although some require additional process steps, thus resulting in higher fabrication cost.
Resistors are often used in biasing circuits and feedback networks. Different types of re-sistors are available via CMOS front-end and back-end process steps, for example polysilicon stripes with N+ or P+ doping, N- or P-well diffusions and thin-film resistors. Although they typically have up to 20% deviation from their nominal resistance with processing variations their relative matching accuracy with respect to each other can be better than 1% [60].
Capacitors are available in nm-CMOS technologies in different forms. The gate to source and drain capacitance of a conventional MOS transistor can serve as a non-linear capacitor to ground or VDD. The accumulation-mode MOS capacitors, e.g., n+ diffusion in an N-well or
p+ diffusion in a P-well, offer a large tuning range (TRC) defined as
max min C C TR C (2.4)
where Cmax and Cmin are the maximal and minimal capacitance, respectively. In a 0.18µm
CMOS technology, TRC is 2 [62], while in a 90nm CMOS technology, TRC is higher than 4. At
the same time, their quality factor (Q-factor, i.e., the ratio between the energy stored and energy loss per cycle when used in a resonance tank) can be higher than 50 at frequencies below 10GHz [63]. They are standard components in nm-CMOS technologies and often found in voltage-controlled oscillators (VCOs) as the variable capacitors (varactors). Linear capacitors can be realized by metal-insulator-metal (MIM) parallel plate capacitance [60]. They can achieve low voltage dependency and good temperature stability, as well as low leakage current. Since the metal patterns are defined with higher precision as backend technology scales, MIM capacitors can achieve better capacitance matching and density. Similar to on-chip resistors, accurate matching among capacitors can be achieved, while the absolute capacitance is con-trolled less accurately. As a result, the on-chip RC time constant may deviate by up to ±25% [64]. Sufficient margin and calibration techniques should be used in critical blocks to cover
On-chip inductors are implemented with metal traces using CMOS back-end intercon-nection metal layers [66]. To achieve high Q-factors, the upper metal layers are often used to reduce capacitive and magnetic loss to the substrate. As a result of advances in the CMOS backend technology, thick metal (TM) and ultra-thick metal (UTM) layers (up to 4.5µm in [59]) can be chosen for the top metal layers at extra cost. Due to the reduced metal loss, in-ductors implemented in UTM layers can achieve peak Q-factor above 20 [59]. The induct-ance can be well-defined, as it is determined by the diameter, number of turns, metal width and the spacing between turns, as well as the distance to a ground plane, which are accurately controlled in nm-CMOS technologies. However, care should be taken in chip floor planning to avoid Q-factor degradation and inductance shift due to magnetic coupling to other devices on-chip. In addition, inductors typically occupy large chip area, for example a 5nH inductor occupies 350µm by 350µm including its shielding structures in a 90nm CMOS technology. Therefore, the number of inductors in the circuits should be limited from the cost perspective in event-driven applications.
Transformers and distributed microwave components such as transmission lines can also be implemented on-chip with CMOS back-end metal layers [67]. Unlike standard resistors, capacitor and inductors, customized design is often required for transformers and transmis-sion lines for performance optimization under different frequencies and specifications [66]. Transmission lines are seldom used on-chip at 1GHz or below as their physical size is pro-portional to the wavelength of the electromagnetic (EM) wave, which is around 15cm in sili-con dioxide at 1GHz.
2.1.3 Digital circuits
Most of the properties in digital circuits improve as technology scales. The switching speed of logic gates improves as the fT of the transistors increases [68]. As the typical supply voltage
reduces from 1.8V in 0.18µm CMOS to 1.2V in 90nm CMOS technologies, the dynamic power consumption of digital circuits continues to decrease in newer technologies. In addition, var-ious techniques such as high-k gate dielectric [69] and power gating [70] help to minimize the
Chapter 2 Ultra-Low-Power Transceiver Design in nm-CMOS
power consumption due to leakage. Driven by Moore‟s law, the number of gates per unit area doubles for each technology generation, which reduces the size and cost of pure digital circuits and systems.
Digital intensive radio architectures, such as the all-digital phase-locked loop (ADPLL) based transmitter [71] and the direct-RF sampling, discrete-time receiver [72] have been proposed and implemented. These new architectures shift the signal processing from the tra-ditional voltage domain to the time domain or charge domain to mitigate the limited dynamic range due to reduced voltage supply in nm-CMOS technologies. In addition, higher configu-rability to multiple modes and standards, better immunity to noise and PVT variations, as well as scalability toward newer technologies are all featured by digital intensive radio trans-ceivers.
Another way for radios to incorporate and benefit from digital circuits is built-in self test (BIST) and calibration (BISC) of a transceiver front-end. The performance degradation in the analog domain can be detected and calibrated in the digital domain [73], [74]. Background calibration routines such as Tx pre-distortion [75] and analog-to-digital (ADC) offset / mis-match compensation [76] can run together with radio activity, so the overall performance is guaranteed despite non-idealities in the radio front-end, including component mismatch, PVT variations and non-linearity. In the event-driven radio design, this implies that the radio front-end can be designed with less performance margin and lower power consumption, while using digital calibration algorithms to ensure the proper operation of the front-end.
2.2 Low-Power Transceiver Architectures
The stringent power budget of event-driven radios cannot be achieved simply via advanced process technologies or low-power circuit techniques. Instead, it is more important to choose radio architectures which are optimized for low-power operation. In this section, several low-power radio architectures are investigated.
2.2.1 Transmitter architectures
In nm-CMOS technologies there is great flexibility in transmitter architectures. While the super-heterodyne transmitter achieves the best performance and reliability, its complexity and dependence on off-chip filtering is challenging for fully-integrated low-power implementa-tions [77]. The two potential low-power Tx architectures, i.e., direct-conversion Tx and di-rect-modulation Tx, are analyzed for the event-driven radio design.
Figure 2-2: Block diagram of direct-conversion Tx front-end [77].
Figure 2-2 shows the block diagram of a direct-conversion Tx front-end. The complex digital baseband signals are firstly converted to two branches of analog baseband signals via a pair of digital-to-analog converters (DACs), which are followed by two low-pass filters (LPFs) to suppress clock aliasing. The analog baseband signals are upconverted by the quad-rature local oscillator (LO) signal and then amplified by the power amplifier (PA) after sum-mation.
The direct-conversion Tx front-end can support virtually all modulation schemes, as the modulation is carried out in the digital domain while the analog front-end just upconverts the modulated signal to the carrier frequency. It also obviates the need for off-chip components,
Chapter 2 Ultra-Low-Power Transceiver Design in nm-CMOS
which enables low-cost and fully-integrated implementations. Since the baseband signal is directly upconverted to RF, such transmitters suffer from LO leakage and LO pulling effects [77].
An example of a low-power direct-conversion transmitter is given in [78]. The radio adopts frequency-shift-keying (FSK) modulation, and delivers -6dBm output power at 900MHz. Thanks to the constant-envelope modulation scheme, a nonlinear PA can be used to achieve a power efficiency of around 50%. However, the frequency synthesizer, operating at twice the carrier frequency to generate quadrature LO signals, consumes more than 1/3 of the total power consumption, degrading the overall power efficiency to below 10%.
Figure 2-3: Block diagram of a direct-modulation (polar) Tx front-end [79].
Direct-modulation transmitters can be implemented in different forms. Figure 2-3 illus-trates one realization that supports most modulation schemes: a polar transmitter [79]. The complex modulation is separated into the phase and amplitude paths and applied directly at the frequency synthesizer and PA, respectively. The transmitter can be simplified if con-stant-envelope modulation such as FSK is used, as a conventional PA can be used without amplitude modulation. Similarly, if amplitude modulation such as on/off keying (OOK) is used, the phase of the carrier signal does not need to be locked by a phase-locked loop (PLL), and a free-running oscillator with duty-cycled frequency calibration would be sufficient [80].
An ultra-low-power direct-modulation OOK transmitter is demonstrated by [40]. The block diagram of the transmitter is shown in Figure 2-4. The 2GHz carrier signal is generated using a film bulk acoustic wave resonator (FBAR) oscillator without a PLL or a frequency locked loop (FLL), and the modulation is carried out by switching on and off the entire front-end. The output power is -3dBm while the power consumption is 2.15mW, resulting an overall power efficiency of 23%.
Figure 2-4: Block diagram of the direct-modulation OOK Tx in [40].
By comparing [78] and [40] it is clear that the direct-modulation Tx benefits from lower power consumption in stages preceding the PA (pre-PA). This is especially important for low-power transmitters, where the output power level (Pout) is low and the power drawn by
the pre-PA (Ppre-PA) may be comparable to the PA power consumption (PPA). The overall
effi-ciency of a transmitter (ηTx) is given by:
1
, 1
out out Tx
Tx PA pre PA PA pre PA out
P P P P P P P (2.5)
where ηPA is the drain efficiency of the PA. To maximize ηTx, not only should the PA efficiency
be maximized, but also the pre-PA power should be kept at just a fraction of Pout, which is
below 0dBm (1mW) as specified in Chapter 1. Therefore, the direct-modulation architecture is chosen in this work for its high overall power efficiency at low RF output levels.
Challenges still remain even for the direct-modulation Tx. The transmitter in [40] is only able to deliver OOK modulation at the resonance frequency of the FBAR oscillator, offering
