W ramach dalszych prac rozwojowych związanych z tematyką niniejszej pracy doktorskiej autor zamierza: 1. Rozbudować system zabezpieczeń tak, by umożliwić pracę układu szeregowego przy pełnym
wykorzy-staniu parametrów znamionowych użytych elementów, w szczególności kondensatorów DC.
2. Przystosować układ szeregowy do pracy w trybie stabilizacji ciągłej w sieci o znamionowym napięciu fazowym 230 V.
3. Zmodernizować algorytm obliczania napięcia wzorcowego odbiornika, uwzględniając optymalizację wymiany mocy czynnej między układem szeregowym a siecią zasilającą w różnych stanach pracy. 4. Przeprowadzić próby pracy układu stabilizatora z trójfazowymi odbiornikami nieliniowymi, w
szcze-gólności z prostownikiem sterowanym.
5. Opracować algorytm sterowania umożliwiający pracę układu szeregowego w charakterze aktywnego układu blokującego przepływ wyższych harmonicznych – razem z pasywnym filtrem równoległym. 6. Opracować algorytm sterowania umożliwiający wykorzystanie układu stabilizatora jako część
szere-gową układu UPQC – razem z aktywnym filtrem równoległym.
7. Opracować implementacje algorytmów sterujących umożliwiających wykonanie układu sterowania w oparciu o dedykowane układy z procesorem DSP.
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