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Functional Modes

W dokumencie MC56F824X-3 (Stron 167-171)

TMRx_ENBL field descriptions

6.6.2 Functional Modes

The selected external count signals are sampled at the TMR's base clock rate and then run through a transition detector. The maximum count rate is one-half of the TMR's base clock rate. Internal clock sources can be used to clock the counters at the TMR's base clock rate.

If a counter is programmed to count to a specific value and then stop, the CTRL[CM]

field is cleared when the count terminates.

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6.6.2.1 Stop Mode

If CTRL[CM] is set to '000', the counter is inert. No counting will occur. Stop mode will also disable the interrupts caused by input transitions on a selected input pin.

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6.6.2.2 Count Mode

If CTRL[CM] is set to '001', the counter will count the rising edges of the selected clock source. This mode is useful for generating periodic interrupts for timing purposes, or counting external events such as "widgets" on a conveyor belt passing a sensor. If the selected input is inverted by setting SCTRL[IPS] (input polarity select), then the negative edge of the selected external input signal is counted.

Example: 6.6.2.2.1 Count Pulses from External Source

// (See Processor Expert PulseAccumulator bean.) // This example uses TMRA1 to count pulse (actually counts rising edges of the pulse) // from an external source (TA3).

//

void Pulse_Init(void)

{ /* TMRA1_CTRL: CM=0,PCS=3,SCS=0,ONCE=0,LENGTH=0,DIR=0,Co_INIT=0,OM=0 */

setReg(TMRA1_CTRL,0x0600); /* Set up mode */

/* TMRA1_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0, Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */

setReg(TMRA1_SCTRL,0x00);

setReg(TMRA1_CNTR,0x00); /* Reset counter register */

setReg(TMRA1_LOAD,0x00); /* Reset load register */

setRegBitGroup(TMRA1_CTRL,CM,0x01); /* Run counter */

}

Example: 6.6.2.2.2 Generate Periodic Interrupt By Counting Internal Clocks

// (See Processor Expert TimerInt bean.) // This example generates an interrupt every 100ms, // assuming the chip is operating at 60 MHz.

//// It does this by using the IP_bus_clk divided by 128 as the counter clock source.

// The counter then counts to 46874 where it matches the COMP1 value.

// At that time an interrupt is generated, the counter is reloaded and // the next COMP1 value is loaded from CMPLD1.

//void TimerInt_Init(void) {

/* TMRA0_CTRL: CM=0,PCS=0,SCS=0,ONCE=0,LENGTH=1,DIR=0,Co_INIT=0,OM=0 */

setReg(TMRA0_CTRL,0x20); /* Stop all functions of the timer */

/* TMRA0_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0, Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */

setReg(TMRA0_SCTRL,0x00);

setReg(TMRA0_LOAD,0x00); /* Reset load register */

setReg(TMRA0_COMP1,46874); /* Set up compare 1 register */

setReg(TMRA0_CMPLD1,46874); /* Also set the compare preload register */

/* TMRA0_CSCTRL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF2EN=0,TCF1EN=1, TCF2=0,TCF1=0,CL2=0,CL1=1 */

setReg(TMRA0_CSCTRL,0x41); /* Enable compare 1 interrupt and */

/* compare 1 preload */

setRegBitGroup(TMRA0_CTRL,PCS,0xF); /* Primary Count Source to IP_bus_clk / 128 */

setReg(TMRA0_CNTR,0x00); /* Reset counter register */

setRegBitGroup(TMRA0_CTRL,CM,0x01); /* Run counter */

}

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6.6.2.3 Edge-Count Mode

If CTRL[CM] is set to '010', the counter will count both edges of the selected external clock source. This mode is useful for counting the changes in the external environment, such as a simple encoder wheel.

Example: 6.6.2.3.1 Count Both Edges of External Source Signal

// (See Processor Expert PulseAccumulator bean.)

// This example uses TMRA1 to count pulse (actually counts rising edges of the pulse) // from an external source (TA3).

//

void Pulse_Init(void)

{ /* TMRA1_CTRL: CM=0,PCS=3,SCS=0,ONCE=0,LENGTH=0,DIR=0,Co_INIT=0,OM=0 */

setReg(TMRA1_CTRL,0x0600); /* Set up mode */

/* TMRA1_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0, Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */

setReg(TMRA1_SCTRL,0x00);

setReg(TMRA1_CNTR,0x00); /* Reset counter register */

setReg(TMRA1_LOAD,0x00); /* Reset load register */

setRegBitGroup(TMRA1_CTRL,CM,0x02); /* Run counter */

}

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6.6.2.4 Gated-Count Mode

If CTRL[CM] is set to '011', the counter will count while the selected secondary input signal is high. This mode is used to time the duration of external events. If the selected input is inverted by setting SCTRL[IPS] (input polarity select), then the counter will count while the selected secondary input is low.

Example: 6.6.2.4.1 Capture Duration of External Pulse

// (See Processor Expert PulseAccumulator bean.)

// This example uses TMRA1 to determine the duration of an external pulse.

//// The IP_bus clock is used as the primary counter. If the duration of the // external pulse is longer than 0.001 seconds one of the other IP_bus clock // dividers can be used. If the pulse duration is longer than 0.128 seconds // an external clock source will have to be used as the primary clock source.

//

void Pulse1_Init(void)

{ /* TMRA1_CTRL: CM=0,PCS=8,SCS=1,ONCE=0,LENGTH=0,DIR=0,Co_INIT=0,OM=0 */

setReg(TMRA1_CTRL,0x1080); /* Set up mode */

/* TMRA1_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0, Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */

setReg(TMRA1_SCTRL,0x00);

setReg(TMRA1_CNTR,0x00); /* Reset counter register */

setReg(TMRA1_LOAD,0x00); /* Reset load register */

setRegBitGroup(TMRA1_CTRL,CM,0x03); /* Run counter */

}

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6.6.2.5 Quadrature-Count Mode

If CTRL[CM] is set to '100', the counter will decode the primary and secondary external inputs as quadrature encoded signals. Quadrature signals are usually generated by rotary or linear sensors used to monitor movement of motor shafts or mechanical equipment.

The quadrature signals are square waves that are 90 degrees out of phase. The decoding of quadrature signal provides both count and direction information.

This figure shows a timing diagram illustrating the basic operation of a quadrature incremental position encoder.

UP/DN PHASEA

COUNT PHASEB

+1 +1 +1 +1 +1 +1 +1 +1 -1-1 -1 -1 -1 -1-1 -1 -1 -1

Figure 6-119. Quadrature Incremental Position Encoder

Example: 6.6.2.5.1 Quadrature Count Mode Example

// (See Processor Expert PulseAccumulator bean.)

// This example uses TMRA0 for counting states of a quadrature position encoder.

//// Timer input 0 is used as the primary count source (PHASEA).

// Timer input 1 is used as the secondary count source (PHASEB).

//void Pulse_Init(void) {

/* TMRA0_CTRL: CM=0,PCS=0,SCS=1,ONCE=0,LENGTH=0,DIR=0,Co_INIT=0,OM=0 */

setReg(TMRC0_CTRL,0x80); /* Set up mode */

/* TMRA0_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0, Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */

setReg(TMRA0_SCTRL,0x00);

setReg(TMRA0_CNTR,0x00); /* Reset counter register */

setReg(TMRA0_LOAD,0x00); /* Reset load register */

setReg(TMRA0_COMP1,0xFFFF); /* Set up compare 1 register */

setReg(TMRA0_COMP2,0x00); /* Set up compare 2 register */

/* TMRA0_CSCTRL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0, TCF2EN=0,TCF1EN=0,TCF2=0,TCF1=0,CL2=0,CL1=0 */

setReg(TMRA0_CSCTRL,0x00);

setRegBitGroup(TMRA0_CTRL,CM,0x04); /* Run counter */

}

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6.6.2.6 Quadrature-Count Mode with Index Input

As an extension to the quadrature count mode discussed in the previous paragraph, some rotary shafts have a HOME or INDEX indicator. This would be a third input to the timer that is used to reset the timer's counter.

In this example, channel 0 is used to decode the quadrature inputs, but it doesn't actually count. Because its upper and lower limits are both set to 0, its output is cascaded count up and count down signals each time the quadrature inputs indicate a change in count.

Channel 1 works in cascaded count mode receiving its counting instructions from channel

W dokumencie MC56F824X-3 (Stron 167-171)