DG408-2

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

8-Ch/Dual 4-Ch High Performance CMOS Analog Multiplexers

Features Benefits Applications

 Low On-Resistance—rDS(on): 100

 Low Charge Injection—Q: 20 pC

 Fast Transition Time—tTRANS: 160 ns

 Low Power—ISUPPLY: 10 A

 Single Supply Capability

 44-V Supply Max Rating

 Reduced Switching Errors

 Reduced Glitching

 Improved Data Throughput

 Reduced Power Consumption

 Increased Ruggedness

 Superior to DG508/509A

 Wide Supply Ranges (
5 V to
20 V)

 Data Acquisition Systems

 Audio Signal Routing

 ATE Systems

 Battery Powered Systems

 High Rel Systems

 Single Supply Systems

 Medical Instrumentation

Description

The DG408 is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (A

, A

, A

). The DG409 is a dual 4-channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2-bit binary address (A

, A

). Break-before-make switching action protects against momentary crosstalk between adjacent channels.

An on channel conducts current equally well in both directions. In the off state each channel blocks voltages up to the power supply rails. An enable (EN) function allows the user to reset the multiplexer/demultiplexer to all switches off for stacking several devices. All control

inputs, address (A

) and enable (EN) are TTL compatible over the full specified operating temperature range.

Applications for the DG408/409 include high speed data acquisition, audio signal switching and routing, ATE systems, and avionics. High performance and low power dissipation make them ideal for battery operated and remote instrumentation applications.

Designed in the 44-V silicon-gate CMOS process, the absolute maximum voltage rating is extended to 44 V.

Additionally, single supply operation is also allowed. An epitaxial layer prevents latchup.

For additional information please see Technical Article TA201.

Functional Block Diagrams and Pin Configurations

S3

A₀

S6

D S₄

A₁

S₈ S₇ EN

Dual-In-Line SOIC and TSSOP

A₂

V– GND

S₁ V+

S₂ S₅

Decoders/Drivers 1

2 3 4 5 6 7

16 15 14 13 12 11 10

Top View

8 9

A₀

Da

A₁

Db

EN GND

V– V+

S_1a S_1b

S_2a S_2b

S3a S3b

S_4a S_4b

Dual-In-Line SOIC and TSSOP

Decoders/Drivers 1

2 3 4 5 6 7

16 15 14 13 12 11 10

Top View

8 9

DG408 DG409

Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70062.

Applications information may also be obtained via FaxBack, request document #70600.

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054 S Phone (408)988-8000 S FaxBack (408)970-5600 S www.siliconix.com S-56533*Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Functional Block Diagrams and Pin Configurations (Cont’d)

Truth Table — DG408 Truth Table — DG409

A₂ A₁ A₀ EN

On

Switch A₁ A₀ EN On Switch

X X X 0 None X X 0 None

0 0 0 1 1 0 0 1 1

0 0 1 1 2 0 1 1 2

0 1 0 1 3 1 0 1 3

0 1 1 1 4 1 1 1 4

1 0 0 1 5

1 0 1 1 6 Logic “0” = V_ALv 0.8 V

Logic “1” = VAHw 2 4 V

1 1 0 1 7 Logic “1” = VAHw 2.4 V

X = Don’t Care

1 1 1 1 8

Ordering Information — DG408 Ordering Information — DG409

Temp Range Package Part Number Temp Range Package Part Number

16-Pin Plastic DIP DG408DJ 16-Pin Plastic DIP DG409DJ

–40 to 85_C 16-Pin SOIC DG408DY –40 to 85_C 16-Pin SOIC DG409DY

16-Pin TSSOP DG408DQ 16-Pin TSSOP DG409DQ

DG408AK DG409AK

–55 to 125_C 16-Pin CerDIP DG408AK/883

–55 to 125_C 16-Pin CerDIP DG409AK/883 –55 to 125_C

5962-920401MEA –55 to 125_C

5962-920402MEA

LCC-20* 5962-920401M2A LCC-20* 5962-920402M2A

*Block Diagram and Pin Configuration not shown.

Absolute Maximum Ratings

Voltage Referenced to V–

V+ . . . 44 V GND. . . 25 V Digital Inputs^a, V_S, V_D . . . (V–) –2 V to (V+) +2 V or 20 mA, whichever occurs first Current (Any Terminal) . . . 30 mA Peak Current, S or D

(Pulsed at 1 ms, 10% Duty Cycle Max). . . 100 mA Storage Temperature (AK Suffix) . . . –65 to 150_C (DJ, DY Suffix). . . –65 to 125_C Power Dissipation (Package)^b

16-Pin Plastic DIP^c . . . 450 mW

16-Pin Narrow SOIC and TSSOP^d . . . 600 mW 16-Pin CerDIP^e . . . 900 mW LCC-20^f . . . 750 mW

Notes

a. Signals on S_X, D_X or IN_X exceeding V+ or V– will be clamped by internal diodes. Limit forward diode current to maximum current ratings.

b. All leads soldered or welded to PC board.

c. Derate 6 mW/_C above 75_C.

d. Derate 7.6 mW/_C above 75_C.

e. Derate 12 mW/_C above 75_C.

f. Derate 10 mW/_C above 75_C.

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054 S Phone (408)988-8000 S FaxBack (408)970-5600 S www.siliconix.com S-56533*Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Specifications ^a

Test Conditions Unless Otherwise Specified

A Suffix

–55 to 125_C D Suffix –40 to 85_C

Parameter Symbol

V+ = 15 V, V– = –15 V

V_AL = 0.8 V, V_AH = 2.4 V^f Temp^b Typ^c Min^d Max^d Min^d Max^d Unit Analog Switch

Analog Signal Range^e V_ANALOG Full –15 15 –15 15 V

Drain-Source

On-Resistance r_DS(on) V_D = "10 V, IS = –10 mA Room Full

40 100

125

100

125 W

rDS(on) Matching

Between Channels^g DrDS(on) VD = "10 V Room 15 15 %

Source Off

Leakage Current I_S(off) V_S = "10 V, VD = #10 V V_EN = 0 V

Room Full

–0.5 –50

0.5 50

–0.5 –5

0.5 5

Drain Off Leakage

C ID(off)

V_D = "10 V VS = #10 V

DG408 Room Full

–1 –100

1 100

–1 –20

1 g 20

Current I_D(off) VS = #10 V

V_EN = 0 V DG409 Room

Full

–1 –50

1 50

–1 –10

1

10 nA

Drain On Leakage

C I_D(on)

VS = VD ="10 V Sequence Each

DG408 Room Full

–1 –100

1 100

–1 –20

1 g 20

Current I_D(on) Sequence Each

Switch On DG409 Room

Full

–1 –50

1 50

–1 –10

1 10 Digital Control

Logic High Input Voltage V_INH Full 2.4 2.4

Logic Low Input Voltage V_INL Full 0.8 0.8 VV

Logic High Input Current I_AH V_A = 2.4 V, 15 V Full –10 10 –10 10

Logic Low Input Current IAL VEN = 0 V, 2.4 V, VA = 0 V Full –10 10 –10 10 mAmA

Logic Input Capacitance Cin f = 1 MHz Room 8 pF

Dynamic Characteristics

Transition Time t_TRANS See Figure 2 Full 160 250 250

Break-Before-Make

Interval t_OPEN See Figure 4 Room 10 10

ns Enable Turn-On Time t_ON(EN)

See Figure 3

Room Full

115 150

225

150 ns

Enable Turn-Off Time t_OFF(EN)

g

Room 105 150 150

Charge Injection Q C_L = 10 nF, V_S = 0 V Room 20 pC

Off Isolation^h OIRR VEN = 0 V, RL = 1 kW

f = 100 kHz Room –75 dB

Source Off Capacitance C_S(off) V_EN = 0 V, V_S = 0 V, f = 1 MHz Room 3

Drain Off Capacitance C_D(off) DG408 Room 26

Drain Off Capacitance C_D(off)

V_EN = 0 V, V_D = 0 V f 1 MH

DG409 Room 14 pF

Drain On Capacitance C_D(on)

EN , _D

f = 1 MHz DG408 Room 37

Drain On Capacitance C_D(on)

DG409 Room 25

Power Supplies

Positive Supply Current I+

V_EN= V_A= 0 V or 5 V Full 10 75 75

Negative Supply Current I– V_EN = V_A = 0 V or 5 V mA

Full 1 –75 –75 mA

Positive Supply Current I+

V_EN = 2.4 V, V_A = 0 V

Room Full

0.2 0.5

2

0.5

2 mA

Negative Supply Current I– Full –500 –500 mA

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054 S Phone (408)988-8000 S FaxBack (408)970-5600 S www.siliconix.com S-56533
Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Specifications ^a for Single Supply

Test Conditions Unless Otherwise Specified

A Suffix

–55 to 125_C D Suffix –40 to 85_C

Parameter Symbol

V+ = 12 V, V– = 0 V

V_AL = 0.8 V, V_AH = 2.4 V^f Temp^b Typ^c Min^d Max^d Min^d Max^d Unit Analog Switch

Drain-Source

On-Resistancee, f r_DS(on) V_D = 3 V, 10 V, I_S = – 1 mA Room 90 W

Dynamic Characteristics Switching Time of

Multiplexer^e t_TRANS V_S1 = 8 V, V_S8 = 0 V, V_IN = 2.4 V Room 180 Enable Turn On Time^e tON(EN) VINH = 2.4 V, VINL = 0 V

V 5 V

Room 180 ns

Enable Turn Off Time^e t_OFF(EN)

INH , _INL

V_S1 = 5 V Room 120

Charge Injection^e Q CL = 1 nF, VS= 6 V, RS = 0 Room 5 pC

Notes

a. Refer to PROCESS OPTION FLOWCHART.

b. Room = 25_C, Full = as determined by the operating temperature suffix.

c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.

e. Guaranteed by design, not subject to production test.

f. V_IN = input voltage to perform proper function.

g. DrDS(on) = rDS(on) Max – rDS(on) Min.

h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Typical Characteristics

Source/Drain Capacitance vs. Analog Voltage

(pF)CS, D

VANALOG – Analog Voltage (V)

0 15

–15 0 20 40 80

60

V+ = 15 V V– = –15 V

C_D(off)

CS(off)

–10 –5 5 10

Drain Leakage Current vs. Source/Drain Voltage (Single 12-V Supply)

(pA)ID

VD – Drain Voltage (V)

12

0 2 4 6 8 10

–60 –40 –20 60

40

0 20

DG408 I_D(off) DG409 ID(off)

DG409 I_D(on)

DG408 I_D(on) V_S = 0 V for I_D(off)

V_S = V_D for I_D(on)

ÉÉÉÉÉÉÉÉÉÉÉÉÉ

ÉÉÉÉÉÉÉÉÉÉÉÉÉ

ÉÉÉÉÉÉÉÉÉÉÉÉÉ

ÉÉÉÉÉÉÉÉÉÉÉÉÉ

ÉÉÉÉÉÉÉÉÉÉÉÉÉ

ÉÉÉÉÉÉÉÉÉÉÉÉÉ

Input Switching Threshold vs. Supply Voltage

(V)INV

VSUPPLY (V)

12 20

4 8 16

0.0 0.5 2.0

1.5

1.0

Negative Supply Current vs. Switching Frequency

I–

Switching Frequency (Hz)

10 k 10 M

100 1 k 100 k 1 M

V_SUPPLY =
15 V –100 mA

–1 mA

–100
A –10
A

–1
A

–0.1
A –10 mA

VEN = 2.4 V

VEN = 0 V or 5 V C_D(on)

DG408 ID(on), ID(off)

Source Leakage Current vs. Source Voltage Drain Leakage Current vs. Source/DrainVoltage

(nA)IS(off)

(pA)ID

VD or VS — Drain or Source Voltage (V) VS – Source Voltage (V)

0 15

–15 –140

–60 20 100

60

–20

–100

V+ = 15 V V– = –15 V V_S = –V_D for I_D(off) V_D = V_S(open) for I_D(on)

DG409 ID(off)

–10 –5 5 10 –15 0 15

–10 0 10 20

15

5

–5

V+ = 15 V V– = –15 V

V+ = 12 V V– = 0 V

–10 –5 5 10

DG409 I_D(on)

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054 S Phone (408)988-8000 S FaxBack (408)970-5600 S www.siliconix.com S-56533Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Typical Characteristics (Cont’d)

Positive Supply Current vs. Switching Frequency I_SUPPLY vs. Temperature

I+

Switching Frequency (Hz)

10 k 10 M

100 1 k 100 k 1 M

VSUPPLY =
15 V 100 mA

10 mA

1 mA

100 mA

10 mA

V_EN = 2.4 V

VEN = 0 V or 5 V

I+, I–

Temperature (_C)

125

–55 5 45 85

V_SUPPLY =
15 V VA = 0 V V_EN = 0 V I+

–(I–) 100 mA

1 mA 100 nA

10 nA 1 nA 100 pA 10 pA 10 mA

–35 –15 25 65 105

Charge Injection vs. Analog Voltage Positive Supply Current vs. Temperature (DG408)

Q (pC)

I+ (A)

Temperature (_C) V_S – Source Voltage (V)

5 15 20

10

125

–55 5 45 85

0

V+ = 15 V V– = –15 V V_IN = 0 V V_EN = 0 V

–35 –15 25 65 105

–10 30 50 90

70

40

0 80

60

20 10

0 15

–15 –10 –5 5 10

V+ = 15 V V– = –15 V

V+ = 12 V V– = 0 V C_L = 10,000 pF

VIN = 5 Vp-p

r_DS(on) vs. V_D and Supply r_DS(on) vs. V_D and Supply (Single Supply)

rDS(on)()
rDS(on)()

V_D – Drain Voltage (V) V_D – Drain Voltage (V)

0 40 100

60 80 120

20

–20 –16 –12 –8 –4 0 4 8 12 16 20

5 V

8 V
10 V

12 V

20 V

22 0

0 40 100

60 140 160

80 120

20

4 8 12 16 20

V+ = 7.5 V

10 V 12 V

15 V 20 V

22 V V– = 0 V

15 V

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054 S Phone (408)988-8000 S FaxBack (408)970-5600 S www.siliconix.com S-56533Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Typical Characteristics (Cont’d)

r_DS(on) vs. V_S and Temperature r_DS(on) vs. V_S and Temperature (Single Supply)

rDS(on)()W rDS(on)()W

V_S – Source Voltage (V) V_S – Source Voltage (V)

0 15

–15 0 40 60 80

50

10 70

30 20

V+ = 15 V V– = –15 V

125_C 85_C 25_C

–55_C

–10 –5 5 10 0 4 8 12

10 30 50 70 90 110 130

V+ = 12 V V– = 0 V –55_C

–40_C 0_C 125_C

85_C

25_C

2 6 10

Off Isolation and Crosstalk vs. Frequency Insertion Loss vs. Frequency

LOSS (dB)

(dB)

f – Frequency (Hz) f – Frequency (Hz)

10 k 10 M

–30 –70 –90

–50

100 1 k 100 k 1 M

–110

100 M –130

–150

V+ = 15 V V– = –15 V R_L = 1 kW

Off-Isolation

Crosstalk

10 M –5

–2 1

–1 0

–4 –3

–6

V+ = 15 V V– = –15 V Ref. 1 Vrms

RL = 50 W RL = 1 kW

10 100 1 k 10 k 100 k 1 M 100

Switching Time vs. Single Supply Switching Time vs. Bipolar Supply

t (ns) t (ns)

V_SUPPLY (V) V_SUPPLY (V)

15 8

100 150 225

175 200 250

125

9 10 11 12 13 14

275

t_TRANS

tOFF(EN)

t_ON(EN)

75 125 200

150 175

100

t_OFF(EN) t_ON(EN)

t_TRANS

10
12
14
16
18
20
22

-40_C 0_C

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533*Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Schematic Diagram (Typical Channel)

Figure 1.

EN A₀

S₁ D

V+

S_n Decode/ V–

Drive Level

Shift

V–

V+

V_REF

A_X GND

V+

Test Circuits

Figure 2. Transition Time A1

A₀ A2

A₁ A0

+15 V

–15 V EN

V+

V–

GND

D

35 pF VO

S₁ S2 – S7

S8

50
300

#10 V

"10 V

+15 V

–15 V EN

V+

V–

GND

35 pF VO

S₁ S1a – S4a, Da

S4b

50
300

#10 V

"10 V

D_b

Logic Input

Switch Output

V_S8 V_O

t_TRANS

tr <20 ns t_f <20 ns

S₈ ON S₁ ON

t_TRANS 0 V

V_S1

50%

90%

90%

3 V 0 V DG408

DG409

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533
Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Test Circuits

Figure 3. Enable Switching Time Logic

Input

Switch Output VO

t_r <20 ns tf <20 ns 3 V

0 V

0 V

t_OFF(EN) tON(EN)

50%

90%

10%

V_O EN

S₁

S₂ – S₈ A₀

A₁ A₂

50
1 k

VO

V+

GND V– D

– 5 V

35 pF –15 V

+15 V

S_1b S_1a – S_4a, D_a S_2b – S_4b

D_b EN

A₀ A₁

50
1 k

VO

V+

GND V–

– 5 V

35 pF –15 V

+15 V DG408

DG409

Figure 4. Break-Before-Make Interval

50%

80%

Logic Input

Switch Output VO

V_S

t_OPEN

tr <20 ns t_f <20 ns

0 V 3 V 0 V

EN V+

GND V–

+5 V

35 pF –15 V

+15 V

+2.4 V

A₂ D_b, D

All S and Da

300

V_O

50
A₁ A₀

DG408 DG409

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533
Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Test Circuits

Figure 5. Charge Injection A0

EN

A₁ A₂

V_O V+

GND V–

D

–15 V +15 V R_g

S_X

C_L 10 nF Channel

Select

3 V 0 V

OFF ON

Logic Input

Switch Output

DVO

DVO is the measured voltage due to charge transfer error Q, when the channel turns off.

Q = C_L x DVO

OFF

Figure 6. Off Isolation

Figure 7. Crosstalk R_L 1 kW

V_O V+

GND V–

–15 V +15 V

A₂

D A₁

A₀ S₈ SX

V_S

EN R_g = 50 W

Off Isolation = 20 log V_OUT V_IN V_IN

RL

1 kW V_O V+

GND V–

–15 V +15 V

A₂

D A₁

A0

S₈ S_X V_S

EN Rg = 50 W

Crosstalk = 20 log V_OUT V_IN VIN S₁

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533
Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Test Circuits

Figure 8. Insertion Loss

Figure 9. Source Drain Capacitance R_L A2 1 k

V_O D

Rg = 50

Insertion Loss = 20 log V_OUT A1

V_IN A₀

VS

S₁ V+

GND V–

–15 V +15 V

EN

f = 1 MHz S₁

D EN

+15 V

–15 V GND

V+

V–

Meter HP4192A Impedance Analyzer or Equivalent S8

A₁ A₂

A₀ Channel

Select

Application Hints

Overvoltage Protection

A very convenient form of overvoltage protection consists of adding two small signal diodes (1N4148, 1N914 type) in series with the supply pins (see Figure 10).

This arrangement effectively blocks the flow of reverse currents. It also floats the supply pin above or below the normal V+ or V– value. In this case the overvoltage signal actually becomes the power supply of the IC. From the

point of view of the chip, nothing has changed, as long as

the difference V

– (V–) doesn’t exceed +44 V. The

addition of these diodes will reduce the analog signal

range to 1 V below V+ and 1 V above V–, but it preserves

the low channel resistance and low leakage

characteristics.

Vishay-Siliconix, 2201 Laurelwood Road, Santa Clara, CA 95054  Phone (408)988-8000  FaxBack (408)970-5600  www.siliconix.com S-56533
Rev. D, 30-Mar-98 Siliconix was formerly a division of TEMIC Semiconductors

Application Hints (Cont’d)

1N4148

DG408

D

V–

V+

1N4148 S_X

Vg

Figure 10. Overvoltage Protection Using Blocking Diodes

EN A₀ A₁

+15 V

(MUX On-Off Control) Analog

Inputs (Outputs)

Clock In

NC

Enable In

Analog Output (Input)

+15 V –15 V

DG408 ^D

EN GND

DM7493

V+ V–

NC

GND +15 V

8-Channel Sequential Multiplexer/Demultiplexer

Analog Inputs (Outputs)

Analog Outputs (Inputs)

+15 V –15 V

DG409 GND

V+ V–

Differential

Differential

Clock In

NC GND +15 V

NC

6 Reset Enable

Differential 4-Channel Sequential Multiplexer/Demultiplexer

J

K CLK

J

K CLK

CLEAR CLEAR

Q S5

S₇ S₆

S₈ S₁

S₃ S2

S₄

S1a

S_3a S_2a

S4a

S_1b

S3b

S_2b

S_4b

D_a

D_b

A₀ A₁ A₂

BIN

A_IN r₀₁ r₀₂

Q_B Q_C QD

QA 1/2 MM74C73 1/2 MM74C73

Figure 11.

Q

Q Q