High Efficiency UV Photodiodes fabricated on p-type Substrate

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XXIII-ET2014, 11-13 Sept. 2014, Sozopol

High Efficiency UV Photodiodes on p-type Substrate

1_{Delft Univ. of Technology,}2_{Phys.-Tech. Bundesanstalt}

P. R. Rao1, S. Milosavljevic1, U. Kroth2, C. Laubis2, S.Nihtianov1 September 11, 2014

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Outline

1 Introduction

UV Domains and Challenges Prior Art: pure-B on n-type Si Why p-type UV Photodiodes? 2 p-type UV Photodiode

Process Development Layout

3 Results

Dark Leakage Current Sensitivity

Stability

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Next Subsection

1 Introduction

3 Results

Stability

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Introduction - UV Domains & Challenges (1/3)

10 1 100 200 300 Lithography Medical 400 13.5 193 DNA Forensic Astronomy P-E UV applications (nm) EUV _DUV VUV NUV Cell spectroscopy

• Application spans a wide range of domains (EUV to NUV) • A broad-band detector simplifies system design & economical

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Introduction - UV Domains & Challenges (2/3)

100 101 102 100 101 102 103 104 Wavelength (nm) Abso rption depth (nm)

• Silicon based detector preferred due to CMOS compatibility • Very shallow absorption depth (a few nm) in DUV/VUV

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Introduction - UV Domains & Challenges (3/3)

UV (=ionizing radiation!) Oxide Depletion region n-cathode p-anode _Traps E

• UV radiation charges oxide with positive charge, and introduces additional interface traps

• This phenomenon affects spectral stability and can increase dark leakage current via surface electric field modification

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Next Subsection

1 Introduction

3 Results

Stability

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Introduction - Prior Art: pure-B on n-type Si

(1/2)

• Oxide free n-type silicon surface exposed to B2H6, using commercial Si/SiGe epitaxial AP/LPCVD reactor at DIMES (TUDelft), at 500◦C – 700◦C

• Creates a thin (few nm) of pure-B on Si surface, and a few nm of in-diffusion into Si:

• acts as a passivation layer for surface interface traps • creates a electric field for enhanced photo-charge collection • acts as a capping (semi-metal) layer and improves stability • Excellent results obtained:

• excellent responsivity in DUV (> 0.1 A/W)

• excellent responsivity close to theoretical maximum in EUV • excellent stability

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Introduction - Prior Art: pure-B on n-type Si

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c-Si α-Si α-B (5 nm) 10 nm

• HRTEM image of the cross-section of a pure-B diode showing the different regions (α-Si layer deposited for contrast)

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Next Subsection

1 Introduction

3 Results

Stability

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Introduction - Why p-type UV Photodiodes?

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n p pinning layer FD p-well TX RST SF n n p-silicon p backside passivation STI Depletion layer Light

• Standard CMOS foundry compatibility ⇒ mass production • Representative of CMOS Image Sensor (CIS) Pixels

• in particular backside-illumination (BSI)

• large area diode can be implemented as a test-device to characterize performance

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Next Subsection

1 Introduction

3 Results

Stability

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p-type - Process Development (1/11)

p-substrate

• Highly doped p-substrate starting material (≈ 800 µm, 1×1019 at/cm3₎

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p-type - Process Development (2/11)

p-substrate p-epitaxy

• p-epitaxy(2.5 µm, 1×1017_at/cm3_{) is grown on the substrate to} create a high-quality material for further processing

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p-type - Process Development (3/11)

n-cathode

• Buried n-cathode(1 µm, 1×1016 _at/cm3_{) is grown on the p-epi.} The depletion should not interact with the low-quality substrate

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p-type - Process Development (4/11)

n-cathode

• p-type boron sidewall cutting implants ensure no p-n junctions are formed at the edges. The deep p-implant mask is reused

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p-type - Process Development (5/11)

p-epitaxy n-cathode

p-substrate

p-epitaxy

• High resisitivity p-epitaxy (1.5 µm, ≈ 1×1014 _at/cm3_{) is grown} on the n-cathode. This is fully-depleted at operational voltage

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p-type - Process Development (6/11)

p-epitaxy n-cathode p-substrate p-well n-well p-epitaxy

• Deep p-and n-well (implant energy = 500 keV) are used to connect to the p-type layer and the n-buried cathode respectively

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p-type - Process Development (7/11)

p-epitaxy p p n-cathode p-substrate p-well n-well p-epitaxy

• p+ _{anode contact implant is made. At this stage, 30 min anneal} at 950◦C is done to activate the implants

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p-type - Process Development (8/11)

p-epitaxy p p n-cathode p-substrate Oxide p-well n-well p-epitaxy

• 375 nm oxide (TEOS) is formed by LPCVD, and patterned to define pure-boron region

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p-type - Process Development (9/11)

pure-B p-epitaxy p p n-cathode p-substrate Oxide p-well n-well p-epitaxy

• 3 nm pure-B is formed by CVD. The oxide serves as a mask for the pure-B deposition as boron does not form on oxide

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p-type - Process Development (10/11)

pure-B p-epitaxy p p n-cathode p-substrate Oxide p-well n-well metal p-epitaxy

• Finally, contact regions are defined, and metal contacts made on the implants to form cathode and anode/ground contacts

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p-type - Process Development (11/11)

p p n-well p-well _p-epi p-epitaxy p-substrate n-cathode oxide

• Parasitic diode leakage currents (n-well – p-epi, n-well – p-well, n-well – p-anode) & surface leakage ⇒ perimeter component

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Next Subsection

1 Introduction

3 Results

Stability

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p-type - Layout(1/2)

Large area diode

Periphery diode

Small area diode

Process monitoring Scribe line

• Top-cell layout view. The large area diode (10 mm × 10 mm), small area diodes (half and quarter size), periphery diode, process monitoring, and some additional test-diodes can be seen

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p-type - Layout (2/2)

p-well p-anode n-cathode p-well n-cathode

• Left: the highly doped regions are separated by 6 µm

• Right: the n-cathode ring is cut to allow the p-anode implant to physically connect with the p-well

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Next Subsection

1 Introduction

3 Results

Stability

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Results - Dark Leakage Current (1/1)

−1.5 −1 −0.5 0 0.5 1 1.5 2 10−12 10−10 10−8 10−6 10−4 10−2 100 Voltage (V) Da rk Cu rrent (A)

• Dark current is 260 pA at 0.5 V reverse bias (RT)

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Next Subsection

1 Introduction

3 Results

Stability

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Results - Sensitivity (1/2)

50 100 150 200 250 300 350 0 0.05 0.1 0.15 0.2 0.25 0.3 Wavelength (nm) Resp onsitivit y

(A/W) p-type substrate

n-type substrate

• Good responsivity in entire DUV; minimum at 280 nm: 0.07 A/W • Quantum efficiency (280 nm) = 26 %

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Results - Sensitivity (2/2)

10 11 12 13 14 15 16 17 18 19 20 0 0.05 0.1 0.15 0.2 0.25 0.3 Wavelength (nm) Resp onsitivit y (A/W)

• Good responsivity in entire EUV; close to theoretical maximum at 13.5 nm

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Next Subsection

1 Introduction

3 Results

Stability

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Results - Stability (1/1)

Befo re After Irr. +20’ 0.9 0.95 1 1 0.93 0.96 No rmalized S ignal 0.8 0.9 1

• Responsivity degradation due to irradiation at 121 nm (179 nW, 40 min), and subsequent recovery. Inset: logarithmic behaviour of the signal as a function of irradiation time (t= 0 to 2400 s)

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Summary & Conclusion

• Pure-B technology has been successfully ported into p-type substrate:

• the pure-B diodes show extremely good broadband sensitivity in the EUV and DUV wavelengths

• the pure-B diodes exhibit very good stability under harsh conditions

• Conclusion: The technology that has been developed can be used as a post-processing step for the passivation of photo-detectors, including BSI image sensors (both CMOS and CCD) in the whole UV range